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Seda Ogrenci Memik

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

58

Venues

13

Active years

2001–2023

Best venue rank

A*

Where they publish

Papers

58 indexed papers, newest first.

YearVenueTitleAuthors
2023ISCASA Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors.Adam Quinn, Manuel Blanco Valentin, Thomas Zimmerman, Davide Braga, Seda Ogrenci Memik, Farah Fahim
2018ICCDMinimizing Thermal Variation in Heterogeneous HPC Systems with FPGA Nodes.Yingyi Luo, Xiaoyang Wang, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Peter H. Beckman
2017DACAdaptive Thermal Management for 3D ICs with Stacked DRAM Caches.Dawei Li, Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik
2017FPLEvaluating irregular memory access on OpenCL FPGA platforms: A case study with XSBench.Yingyi Luo, Xianshan Wen, Kazutomo Yoshii, Seda Ogrenci Memik, Gokhan Memik, Hal Finkel, Franck Cappello
2017ISCASCell-to-array thermal-aware analysis of stacked RRAM.Yingyi Luo, Seda Ogrenci Memik, Jie Gu
2016DATELazy Pipelines: Enhancing quality in approximate computing.Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy
2015DACb-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units.Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy
2015DATEUser-specific skin temperature-aware DVFS for smartphones.Begum Egilmez, Gokhan Memik, Seda Ogrenci Memik, Oguz Ergin
2015ICCDA methodology for power characterization of associative memories.Dawei Li, Siddhartha Joshi, Seda Ogrenci Memik, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran
2015ISCASOn-chip integration of thermoelectric energy harvesting in 3D ICs.Dawei Li, Seda Ogrenci Memik, Lawrence J. Henschen
2013DATEMultispeculative additive trees in high-level synthesis.Alberto A. Del Barrio, Romn Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, Mara C. Molina
2013ICCDExploring the energy efficiency of Multispeculative Adders.Alberto A. Del Barrio, Romn Hermida, Seda Ogrenci Memik
2013ICCDIntegrating thermocouple sensors into 3D ICs.Dawei Li, Ji-Hoon Kim, Seda Ogrenci Memik
2011DATEPower optimization in heterogenous datapaths.Alberto A. Del Barrio, Seda Ogrenci Memik, Mara C. Molina, Jos M. Mendas, Romn Hermida
2011HPCAHardware/software techniques for DRAM thermal management.Song Liu, Brian Leung, Alexander Neckar, Seda Ogrenci Memik, Gokhan Memik, Nikos Hardavellas
2011ISCASA Comprehensive Tapered buffer optimization algorithm for unified design metrics.Song Liu, Seda Ogrenci Memik, Yehea I. Ismail
2010DACA framework for optimizing thermoelectric active cooling systems.Jieyi Long, Seda Ogrenci Memik
2010DATEUsing Speculative Functional Units in high level synthesis.Alberto A. Del Barrio, Mara C. Molina, Jose Manuel Mendias, Romn Hermida, Seda Ogrenci Memik
2010DATEOptimization of the bias current network for accurate on-chip thermal monitoring.Jieyi Long, Seda Ogrenci Memik
2010DATEInversed Temperature Dependence aware clock skew scheduling for sequential circuits.Jieyi Long, Seda Ogrenci Memik
2010DATEOptimization of an on-chip active cooling system based on thin-film thermoelectric coolers.Jieyi Long, Seda Ogrenci Memik, Matthew Grayson
2010FPLAn Interior Point Optimization Solver for Real Time Inter-frame Collision Detection: Exploring Resource-Accuracy-Platform Tradeoffs.Brian Leung, Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra
2009FCCMFPGA Implementation of the Interior-Point Algorithm with Applications to Collision Detection.Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra
2008DACA power and temperature aware DRAM architecture.Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik
2008DACAutomated design of self-adjusting pipelines.Jieyi Long, Seda Ogrenci Memik
2008DACLeakage power-aware clock skew scheduling: converting stolen time into leakage power reduction.Min Ni, Seda Ogrenci Memik
2008FPLTowards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system.Brian Leung, Yan Pan, Christopher L. Schroeder, Seda Ogrenci Memik, Gokhan Memik, Mitra J. Z. Hartmann
2008ICSAn approach for adaptive DRAM temperature and power management.Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik
2007DATESelf-heating-aware optimal wire sizing under Elmore delay model.Min Ni, Seda Ogrenci Memik
2007ICCADA self-adjusting clock tree architecture to cope with temperature variations.Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail
2007ICCADEarly planning for clock skew scheduling during register binding.Min Ni, Seda Ogrenci Memik
2007ICCADA novel SoC design methodology combining adaptive software and reconfigurable hardware.Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto
2006DACSystematic temperature sensor allocation and placement for microprocessors.Rajarshi Mukherjee, Seda Ogrenci Memik
2006FCCMPre-synthesis Queue Size Estimation of Streaming Data Flow Graphs.Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
2006FDLAdaptive Metrics for System-Level Functional Partitioning.Giovanni Agosta, Marco D. Santambrogio, Seda Ogrenci Memik
2006FPLPower Optimization Techniques for SRAM-Based FPGAs.Somsubhra Mondal, Seda Ogrenci Memik
2006FPLPre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators.Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas
2006ICCADPhysical aware frequency selection for dynamic thermal management in multi-core systems.Rajarshi Mukherjee, Seda Ogrenci Memik
2006ICCADThermal sensor allocation and placement for reconfigurable systems.Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik
2006ICCADThermal-induced leakage power optimization by redundant resource allocation.Min Ni, Seda Ogrenci Memik
2006ISCASFine-grain thermal profiling and sensor insertion for FPGAs.Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik
2005ASPDACResource sharing in pipelined CDFG synthesis.Somsubhra Mondal, Seda Ogrenci Memik
2005ASPDACEvaluation of dual VRajarshi Mukherjee, Seda Ogrenci Memik
2005DACTemperature-aware resource allocation and binding in high-level synthesis.Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
2005FPGAHierarchical LUT structures for leakage power reduction (abstract only).Somsubhra Mondal, Seda Ogrenci Memik, Debasish Das
2005FPLReal-Time Feature Extraction for High Speed Networks.David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Alok N. Choudhary
2005ISCASA low power FPGA routing architecture.Somsubhra Mondal, Seda Ogrenci Memik
2005ISLPEDPeak temperature control and leakage reduction during binding in high level synthesis.Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
2004FCCMPower Management for FPGAs: Power-Driven Design Partitioning.Rajarshi Mukherjee, Seda Ogrenci Memik
2004FPLPower-Driven Design Partitioning.Rajarshi Mukherjee, Seda Ogrenci Memik
2003DACGlobal resource sharing for synthesis of control data flow graphs on FPGAs.Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, Eren Kursun
2003ICCADAchieving Design Closure Through Delay Relaxation Parameter.Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh
2002FCCMDesign and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable Logic.Gokhan Memik, Seda Ogrenci Memik, William H. Mangione-Smith
2002ICCDAccelerated SAT-based Scheduling of Control/Data Flow Graphs.Seda Ogrenci Memik, Farzan Fallah
2002ISLPEDEarly evaluation techniques for low power binding.Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh
2001ASPDACRPack: routability-driven packing for cluster-based FPGAs.Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh
2001ICCADInstruction Generation for Hybrid Reconfigurable Systems.Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001ICCADA Super-Scheduler for Embedded Reconfigurable Systems.Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh