Sergej Deutsch
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
14
Venues
7
Active years
2012–2021
Best venue rank
A*
Where they publish
Papers
14 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | MICRO | Cryptographic Capability Computing. | Michael LeMay, Joydeep Rakshit, Sergej Deutsch, David M. Durham, Santosh Ghosh, Anant Nori, Jayesh Gaur, Andrew Weiler, Salmin Sultana, Karanvir Grewal, Sreenivas Subramoney |
| 2020 | ISCC | K-Cipher: A Low Latency, Bit Length Parameterizable Cipher. | Michael E. Kounavis, Sergej Deutsch, Santosh Ghosh, David Durham |
| 2019 | ISCC | IVP: A Three Level Confusion-Diffusion Network Supporting Implicit Data Integrity. | Michael E. Kounavis, David Durham, Sergej Deutsch, Ken Grewal |
| 2017 | ISCC | Non-recursive computation of the probability of more than two people having the same birthday. | Michael E. Kounavis, Sergej Deutsch, David Durham, Saeedeh Komijani |
| 2016 | ICCAD | The hype, myths, and realities of testing 3D integrated circuits. | Ran Wang, Sergej Deutsch, Mukesh Agrawal, Krishnendu Chakrabarty |
| 2015 | ASPDAC | Software-based test and diagnosis of SoCs using embedded and wide-I/O DRAM. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2015 | ITC | Contactless pre-bond TSV fault diagnosis using duty-cycle detectors and ring oscillators. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2015 | ITC | Test and debug solutions for 3D-stacked integrated circuits. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2014 | ITC | Massive signal tracing using on-chip DRAM for in-system silicon debug. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2014 | ITC | Vesuvius-3D: A 3D-DfT demonstrator. | Erik Jan Marinissen, Bart De Wachter, Stephen O'Loughlin, Sergej Deutsch, Christos Papameletis, Tobias Burgherr |
| 2013 | DATE | Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2013 | ETS | Robust optimization of test-architecture designs for core-based SoCs. | Sergej Deutsch, Krishnendu Chakrabarty |
| 2013 | ITC | Uncertainty-aware robust optimization of test-access architectures for 3D stacked ICs. | Sergej Deutsch, Krishnendu Chakrabarty, Erik Jan Marinissen |
| 2012 | ITC | DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks. | Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen |