| 2016 | VLSID | RHyMe: REDEFINE Hyper Cell Multicore for Accelerating HPC Kernels. | Saptarsi Das, Nalesh Sivanandan, Kavitha T. Madhu, Soumitra Kumar Nandy, Ranjani Narayan |
| 2016 | VLSID | VOP: Architecture of a Processor for Vector Operations in On-Line Learning of Neural Networks. | Gopinath Mahale, Soumitra Kumar Nandy, Eshan Bhatia, S. K. Nandy, Ranjani Narayan |
| 2016 | VLSID | An Energy Efficient Dynamically Reconfigurable QR Decomposition for Wireless MIMO Communication. | Ashish Kumar Pradhan, Soumitra Kumar Nandy |
| 2005 | ITC | A low power and low cost scan test architecture for multi-clock domain SoCs using virtual divide and conquer. | Arasu T. Senthil, C. P. Ravikumar, Soumitra Kumar Nandy |
| 2000 | ISCAS | Performance evaluation of multithreaded architectures for media processing applications. | Srinivasan Balakrishnan, Soumitra Kumar Nandy |
| 2000 | ISCAS | Controller redesign based clock and register power minimization. | Srikunth Rao M., Soumitra Kumar Nandy |
| 1998 | VLSID | Arbitrary Precision Arithmetic - SIMD Style. | Srinivasan Balakrishnan, Soumitra Kumar Nandy |
| 1997 | DATE | An asynchronous architecture for digital signal processors. | M. R. Karthikeyan, Soumitra Kumar Nandy |
| 1996 | HiPC | Spatial frequency based motion estimation for image sequence compression. | Vinod Menezes, Soumitra Kumar Nandy, Biswadip Mitra |
| 1995 | VLSID | Wave pipelined architecture folding: a method to achieve low power and low area. | Debabrata Ghosh, Soumitra Kumar Nandy |