| 2026 | DATE | Automatic Extraction of Timing Models for WCET Estimation From a High-Level Synthesis Flow. | Thomas Feuilletin, Dylan Leothaud, Simon Rokicki, Steven Derrien, Isabelle Puaut |
| 2026 | DATE | Area Efficient Speculative Loop Pipelining for High-Level Synthesis. | Dylan Leothaud, Simon Rokicki, Steven Derrien, Isabelle Puaut |
| 2026 | ECRTS | WCET Analysis of HLS-Generated Processors Using Abstract Interpretation. | Thomas Feuilletin, Dylan Leothaud, Simon Rokicki, Steven Derrien, Isabelle Puaut |
| 2025 | DAC | Optimizing Recovery Logic in Speculative High-Level Synthesis. | Dylan Leothaud, Jean-Michel Gorius, Simon Rokicki, Steven Derrien |
| 2025 | DATE | Hardware/Software Runtime for GPSA Protection in RISC-V Embedded Cores. | Louis Savary, Simon Rokicki, Steven Derrien |
| 2024 | CC | A Unified Memory Dependency Framework for Speculative High-Level Synthesis. | Jean-Michel Gorius, Simon Rokicki, Steven Derrien |
| 2024 | FPL | Efficient Design Space Exploration for Dynamic & Speculative High-Level Synthesis. | Dylan Leothaud, Jean-Michel Gorius, Simon Rokicki, Steven Derrien |
| 2019 | DATE | Aggressive Memory Speculation in HW/SW Co-Designed Machines. | Simon Rokicki, Erven Rohou, Steven Derrien |
| 2019 | ECRTS | Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures. | Benjamin Rouxel, Stefanos Skalistis, Steven Derrien, Isabelle Puaut |
| 2019 | RTSS | Reconciling Compiler Optimizations and WCET Estimation Using Iterative Compilation. | Mickal Dardaillon, Stefanos Skalistis, Isabelle Puaut, Steven Derrien |
| 2018 | DATE | Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction. | Thomas Lefeuvre, Imen Fassi, Christoph Cullmann, Gernot Gebhard, Emin-Koray Kasnakli, Isabelle Puaut, Steven Derrien |
| 2018 | DATE | Supporting runtime reconfigurable VLIWs cores through dynamic binary translation. | Simon Rokicki, Erven Rohou, Steven Derrien |
| 2017 | DATE | WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach. | Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clment David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard K. Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon D. ter Braak, Nikolaos S. Voros, Jrgen Becker |
| 2017 | DATE | Superword level parallelism aware word length optimization. | Ali Hassan El Moussawi, Steven Derrien |
| 2017 | DATE | Hardware-accelerated dynamic binary translation. | Simon Rokicki, Erven Rohou, Steven Derrien |
| 2017 | FCCM | A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators. | Yohann Uguen, Florent de Dinechin, Steven Derrien |
| 2017 | FPL | One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs. | Gal Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien |
| 2017 | FPL | Bridging high-level synthesis and application-specific arithmetic: The case study of floating-point summations. | Yohann Uguen, Florent de Dinechin, Steven Derrien |
| 2016 | DATE | System level synthesis for virtual memory enabled hardware threads. | Nicolas Estibals, Gal Deest, Ali Hassan El Moussawi, Steven Derrien |
| 2014 | FCCM | Low Power Reconfigurable Controllers for Wireless Sensor Network Nodes. | Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien, Christophe Huriaux |
| 2014 | ICCAD | Toward scalable source level accuracy analysis for floating-point to fixed-point conversion. | Gal Deest, Tomofumi Yuki, Olivier Sentieys, Steven Derrien |
| 2013 | DAC | Runtime dependency analysis for loop pipelining in high-level synthesis. | Mythri Alle, Antoine Morvan, Steven Derrien |
| 2013 | DSD | Component-Level Datapath Merging in System-Level Design of Wireless Sensor Node Controllers for FPGA-Based Implementations. | Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2013 | SCAM | GeCoS: A framework for prototyping custom hardware design flows. | Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin J. M. Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, Franois Charot, Christophe Wolinski, Olivier Sentieys |
| 2012 | DAC | A semiempirical model for wakeup time estimation in power-gated logic clusters. | Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien |
| 2012 | DSD | From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach. | Jrgen Becker, Timo Stripf, Oliver Oey, Michael Hbner, Steven Derrien, Daniel Mnard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Ghringer |
| 2011 | MODELS | Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far? | Antoine Floch, Tomofumi Yuki, Clment Guy, Steven Derrien, Benot Combemale, Sanjay V. Rajopadhye, Robert B. France |
| 2011 | VLSID | Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters. | Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien |
| 2010 | DAC | A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking. | Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2010 | DSD | System Level Synthesis for Ultra Low-Power Wireless Sensor Nodes. | Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2009 | ISCAS | Ultra Low-power FSM for Control Oriented Applications. | Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2001 | FCCM | Combining Instruction and Loop Level Parallelism for FPGAs. | Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay |
| 2001 | FPL | Loop Tiling for Reconfigurable Accelerators. | Steven Derrien, Sanjay V. Rajopadhye |
| 2000 | FCCM | FCCMS and the Memory Wall. | Steven Derrien, Sanjay V. Rajopadhye |
| 2000 | ICRA | Approximating a Single Viewpoint in Panoramic Imaging Devices. | Steven Derrien, Kurt Konolige |
| 2000 | PDPTA | Interfacing compiled FPGA programs: the MMAlpha approach. | Steven Derrien, Tanguy Risset |