Subash Chandar G.
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
1999–2005
Best venue rank
National
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | DSD | An Effective Framework for Enabling the Reuse of External Soft IP. | Soujanna Sarkar, Subash Chandar G. |
| 2004 | VLSID | Reset Careabouts in a SoC Design. | Subrangshu Das, Subash Chandar G., Ashutosh Tiwari |
| 2001 | ASPDAC | Addressing verification bottlenecks of fully synthesized processor cores using equivalence checkers. | Subash Chandar G., S. Vaideeswaran |
| 2001 | ICCAD | Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-Configurable Encoding. | Subash Chandar G., Mahesh Mehendale, R. Govindarajan |
| 2000 | VLSID | A Framework for Cost vs. Performance Tradeoffs in the Design of Digital Signal Processor Cores. | Karthikeyan Madathil, Jagdish C. Rao, Subash Chandar G., Amitabh Menon, Avinash K. Gautam, Amit M. Brahme, H. Udayakumar |
| 1999 | ICCD | A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron Technology. | Avinash K. Gautam, Jagdish C. Rao, Karthikeyan Madathil, Vilesh Shah, H. Udayakumar, Amitabh Menon, Subash Chandar G. |