| 2024 | FPL | Exploring the Versal AI Engines for Signal Processing in Radio Astronomy. | Victor Van Wijhe, Vincent Sprave, Daniele Passaretti, Nikolaos Alachiotis, Gerrit Grutzeck, Thilo Pionteck, Steven van der Vlugt |
| 2024 | VISIGRAPP | Large Filter Low-Level Processing by Edge TPU. | Gerald Krell, Thilo Pionteck |
| 2023 | ADBIS | What Happens When Two Multi-Query Optimization Paradigms Combine? - A Hybrid Shared Sub-Expression (SSE) and Materialized View Reuse (MVR) Study. | Bala Gurumurthy, Vasudev Raghavendra Bidarkar, David Broneske, Thilo Pionteck, Gunter Saake |
| 2023 | FCCM | A Flexible and Scalable Reconfigurable FPGA Overlay Architecture for Data-Flow Processing. | Anna Drewes, Vitalii Burtsev, Bala Gurumurthy, Martin Wilhelm, David Broneske, Gunter Saake, Thilo Pionteck |
| 2023 | ICDE | ADAMANT: A Query Executor with Plug-In Interfaces for Easy Co-processor Integration. | Bala Gurumurthy, David Broneske, Gabriel Campero Durand, Thilo Pionteck, Gunter Saake |
| 2022 | DEXA | Accelerated Parallel Hybrid GPU/CPU Hash Table Queries with String Keys. | Tobias Groth, Sven Groppe, Thilo Pionteck, Franz Valdiek, Martin Koppehel |
| 2022 | EuroPar | Modeling Task Mapping for Data-Intensive Applications in Heterogeneous Systems. | Martin Wilhelm, Hanna Geppert, Anna Drewes, Thilo Pionteck |
| 2021 | ASPDAC | Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architectures. | Jan Moritz Joseph, Lennart Bamberg, Geonhwa Jeong, Ruei-Ting Chien, Rainer Leupers, Alberto Garca-Ortiz, Tushar Krishna, Thilo Pionteck |
| 2021 | FCCM | Configurable Pipelined Datapath for Data Acquisition in Interventional Computed Tomography. | Daniele Passaretti, Thilo Pionteck |
| 2021 | ICDE | An Investigation of Atomic Synchronization for Sort-Based Group-By Aggregation on GPUs. | Bala Gurumurthy, David Broneske, Martin Schler, Thilo Pionteck, Gunter Saake |
| 2021 | ICPP | CuART - a CUDA-based, scalable Radix-Tree lookup and update engine. | Martin Koppehel, Tobias Groth, Sven Groppe, Thilo Pionteck |
| 2019 | ICCD | System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips. | Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto Garca Ortiz, Thilo Pionteck |
| 2010 | DSN | A concept of a trust management architecture to increase the robustness of nano age devices. | Thilo Pionteck, Werner Brockmann |
| 2010 | EUC | Optimizing Runtime Reconfiguration Decisions. | Thilo Pionteck, Steffen Sammann, Carsten Albrecht |
| 2008 | DDECS | Design and Simulation of Runtime Reconfigurable Systems. | Thilo Pionteck, Carsten Albrecht, Roman Koch, Torben Brix, Erik Maehle |
| 2008 | FPL | On the design parameters of runtime reconfigurable systems. | Thilo Pionteck, Carsten Albrecht, Roman Koch, Erik Maehle |
| 2008 | FPL | Network processors. | Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf |
| 2008 | PDP | Performance Analysis of Bus-Based Interconnects for a Run-Time Reconfigurable Co-Processor Platform. | Carsten Albrecht, Philipp Ro, Roman Koch, Thilo Pionteck, Erik Maehle |
| 2007 | RSP | A Lightweight Framework for Runtime Reconfigurable System Prototyping. | Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik Maehle |
| 2006 | DATE | A dynamically reconfigurable packet-switched network-on-chip. | Thilo Pionteck, Carsten Albrecht, Roman Koch |
| 2006 | FPL | Applying Partial Reconfiguration to Networks-On-Chips. | Thilo Pionteck, Roman Koch, Carsten Albrecht |
| 2004 | FPGA | On the design of a function-specific reconfigurable: hardware accelerator for the MAC-layer in WLANs. | Thilo Pionteck, Thorsten Staake, Thomas Stiefmeier, Lukusa D. Kabulepa, Manfred Glesner |
| 2004 | FPL | A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals. | Thilo Pionteck, Thomas Stiefmeier, Thorsten Staake, Manfred Glesner |
| 2004 | ISCAS | Design of a reconfigurable AES encryption/decryption engine for mobile terminals. | Thilo Pionteck, Thorsten Staake, Thomas Stiefmeier, Lukusa D. Kabulepa, Manfred Glesner |
| 2003 | RSP | The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures. | Thilo Pionteck, A. Garcya, Lukusa D. Kabulepa, Manfred Glesner |
| 2002 | FPL | A Framework for Teaching (Re)Configurable Architectures in Student Projects. | Thilo Pionteck, Peter Zipf, Lukusa D. Kabulepa, Manfred Glesner |
| 2002 | RSP | On the Rapid Prototyping of Equalizers for OFDM Systems. | Thilo Pionteck, N. Toender, Lukusa D. Kabulepa, Manfred Glesner, Tideya Kella |
| 2001 | FPL | Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures. | Jrgen Becker, Nicolas Liebau, Thilo Pionteck, Manfred Glesner |
| 2000 | FPL | DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications. | Jrgen Becker, Thilo Pionteck, Manfred Glesner |