| 2013 | DSD | A Low Power 15-Bit Decimator in 0.18um CMOS for Biomedical Applications. | Kristin Scholfield, Tom Chen |
| 2010 | DSD | On CMOS Memory Design in Low Supply Voltage for Integrated Biosensor Applications. | Allen Chen, Ryan Hoppal, Tom Chen |
| 2008 | ISCAS | Design target exploration for meeting time-to-market using pareto analysis. | Charles Thangaraj, Tom Chen |
| 2006 | DATE | Modeling multiple input switching of CMOS gates in DSM technology using HDMR. | Jayashree Sridharan, Tom Chen |
| 2006 | VLSID | Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis. | Jayashree Sridharan, Tom Chen |
| 2005 | ASPDAC | Stability analysis of active clock deskewing systems using a control theoretic approach. | Vinil Varghese, Tom Chen, Peter Michael Young |
| 2005 | DATE | Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions. | Ajith Chandy, Tom Chen |
| 2005 | DATE | Systematic Analysis of Active Clock Deskewing Systems Using Control Theory. | Vinil Varghese, Tom Chen, Peter Michael Young |
| 2003 | ASPDAC | Design of a CMOS test chip for package models and I/O characteristics verification. | Chetan Despande, Tom Chen |
| 2003 | VLSID | On Single/Dual-Rail Mixed PTL/Static Circuits in Floating-Body SOI and Bulk CMOS: A Comparative Assessment. | Geun Rae Cho, Tom Chen |
| 2002 | ICCD | On The Impact of Technology Scaling On Mixed PTL/Static Circuits. | Geun Rae Cho, Tom Chen |
| 2001 | DATE | On the impact of on-chip inductance on signal nets under the influence of power grid noise. | Tom Chen |
| 2001 | DATE | High quality behavioral verification using statistical stopping criteria. | Amjad Hajjar, Tom Chen, Isabelle Munn, Anneliese Amschler Andrews, Maria Bjorkman |
| 2000 | ICPR | Segmentation of Image Sequences Using SOFM Networks. | Jinsang Kim, Tom Chen |
| 1997 | ASPDAC | A real-time high performance edge detector for computer vision applications. | Fahad M. Alzahrani, Tom Chen |
| 1997 | ASPDAC | A CMOS delayed locked loop (DLL) for reducing clock skew to under 500 ps. | Yong-Bin Kim, Tom Chen |
| 1997 | ICIP | Modified Rate-Distortion Function with Optimal Classification for Wavelet Coding. | Chien-Chih Chen, Tom Chen |
| 1997 | ITC | ASIC Manufacturing Test Cost Prediction at Early Design Stage. | Von-Kyoung Kim, Tom Chen, Mick Tegethoff |
| 1996 | ITC | ASIC Yield Estimation at Early Design Cycle. | Von-Kyoung Kim, Mick Tegethoff, Tom Chen |
| 1994 | ICCD | On-Chip TEC-QED ECC for Ultra-Large, Single-Chip Memory Systems. | Fahad M. Alzahrani, Tom Chen |
| 1994 | ICCD | COBRA: An 1.2 Million Transistor Expandable Column FFT Chip. | Glen Sunada, Jain Jin, Matt Berzins, Tom Chen |
| 1994 | ITC | Defects, Fault Coverage, Yield and Cost in Board Manufacturing. | Mick Tegethoff, Tom Chen |
| 1994 | ITC | Manufacturing-Test Simulator: A Concurrent-Engineering Tool for Boards and MCMs. | Mick Tegethoff, Tom Chen |
| 1992 | ACSAC | Security Products (Security Pro) Transition Analysis Facility (STAF): Pragmatic concepts for MLS technology transition. | Christine Arangio, Tom Chen, Steve Neidhardt |
| 1992 | ICCD | An Ultra-Large Capacity Single-Chip Memory Architecture With Self-Testing and Self-Repairing. | Tom Chen, Glen Sunada |
| 1992 | ITC | A Self-Testing and Self-Repairing Structure for Ultra-Large Capacity Memories. | Tom Chen, Glen Sunada |
| 1991 | ICPP | A Fast 1024-Point FFT Architecture. | Tom Chen, Li Zhu |