| 2020 | IOLTS | A Low Capture Power Oriented X-Identification-Filling Co-Optimization Method. | Toshinori Hosokawa, Kenichiro Misawa, Hiroshi Yamazaki, Masayoshi Yoshimura, Masayuki Arai |
| 2020 | IOLTS | A Test Sensitization State Compaction Method on Controller Augmentation. | Yuki Ikegaya, Toshinori Hosokawa, Yuta Ishiyama, Hiroshi Yamazaki |
| 2019 | IOLTS | A Design for Testability Method for k-Cycle Capture Test Generation. | Yuta Ishiyama, Toshinori Hosokawa, Hiroshi Yamazaki |
| 2019 | IOLTS | A Test Generation Method Based on k-Cycle Testing for Finite State Machines. | Yuya Kinoshita, Toshinori Hosokawa, Hideo Fujiwara |
| 2019 | IOLTS | A Controller Augmentation Method to Improve Transition Fault Coverage for RTL Data-Paths. | Yuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki, Masayoshi Yoshimura |
| 2018 | IOLTS | A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube Justification. | Toshinori Hosokawa, Morito Niseki, Masayoshi Yoshimura, Hiroshi Yamazaki, Masayuki Arai, Hiroyuki Yotsuyanagi, Masaki Hashizume |
| 2018 | IOLTS | A Test Register Assignment Method Based on Controller Augmentation to Reduce the Number of Test Patterns. | Toshinori Hosokawa, Hiroshi Yamazaki, Shun Takeda, Masayoshi Yoshimura |
| 2018 | IOLTS | A Capture Safe Static Test Compaction Method Based on Don't Cares. | Sayuri Ochi, Hiroshi Yamazaki, Toshinori Hosokawa, Masayoshi Yoshimura |
| 2017 | IOLTS | Controller augmentation and test point insertion at RTL for concurrent operational unit testing. | Toshinori Hosokawa, Shun Takeda, Hiroshi Yamazaki, Masayoshi Yoshimura |
| 2017 | PRDC | A Diagnostic Fault Simulation Method for a Single Universal Logical Fault Model. | Toshinori Hosokawa, Hideyuki Takano, Hiroshi Yamazaki, Koji Yamazaki |
| 2017 | PRDC | A Hardware Trojan Circuit Detection Method Using Activation Sequence Generations. | Masayoshi Yoshimura, Tomohiro Bouyashiki, Toshinori Hosokawa |
| 2016 | ETS | A scheduling method for hierarchical testability based on test environment generation results. | Jun Nishimaki, Toshinori Hosokawa, Hideo Fujiwara |
| 2015 | ETS | A low capture power test generation method using capture safe test vectors. | Atsushi Hirai, Yukari Yamauchi, Toshinori Hosokawa, Masayuki Arai |
| 2013 | DDECS | A don't care identification method for test compaction. | Hiroshi Yamazaki, Motohiro Wakazono, Toshinori Hosokawa, Masayoshi Yoshimura |
| 2010 | DDECS | Evaluation of transition untestable faults using a multi-cycle capture test generation method. | Masayoshi Yoshimura, Hiroshi Ogawa, Toshinori Hosokawa, Koji Yamazaki |
| 2003 | ASPDAC | VCore-based design methodology. | Michiaki Muraoka, Hideyuki Hamada, Hiroaki Nishi, Toshihiko Tada, Yoichi Onishi, Toshinori Hosokawa, Kenji Yoshida |
| 2002 | VTS | A Test Generation Method Using a Compacted Test Table and a Test Generation Method Using a Compacted Test Plan Table for RTL Data Path Circuits. | Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka |
| 2001 | ASPDAC | Design for testability strategies using full/partial scan designs and test point insertions to reduce test application times. | Toshinori Hosokawa, Masayoshi Yoshimura, Mitsuyasu Ohta |
| 1995 | ASPDAC | Design for testability using register-transfer level partial scan selection. | Akira Motohara, Sadami Takeoka, Toshinori Hosokawa, Mitsuyasu Ohta, Yuji Takai, Michihiro Matsumoto, Michiaki Muraoka |
| 1993 | DAC | A State Traversal Algorithm Using a State Covariance Matrix. | Akira Motohara, Toshinori Hosokawa, Michiaki Muraoka, Hidetsugu Maekawa, Kazuhiro Kayashima, Yasuharu Shimeki, Seichi Shin |