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Trevor N. Mudge

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

149

Venues

30

Active years

1982–2025

Best venue rank

A*

Where they publish

Papers

149 indexed papers, newest first.

YearVenueTitleAuthors
2025HPCAPalermo: Improving the Performance of Oblivious Memory using Protocol-Hardware Co-Design.Haojie Ye, Yuchen Xia, Yuhan Chen, Kuan-Yu Chen, Yichao Yuan, Shuwen Deng, Baris Kasikci, Trevor N. Mudge, Nishil Talati
2025ISCANMP-PaK: Near-Memory Processing Acceleration of Scalable De Novo Genome Assembly.Heewoo Kim, Sanjay Sri Vallabh Singapuram, Haojie Ye, Joseph Izraelevitz, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2023ASPLOSGRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference.Haojie Ye, Sanketh Vedula, Yuhan Chen, Yichen Yang, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
2023DATEPEDAL: A Power Efficient GCN Accelerator with Multiple DAtafLows.Yuhan Chen, Alireza Khadem, Xin He, Nishil Talati, Tanvir Ahmed Khan, Trevor N. Mudge
2023ISLPEDRecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models.Heewoo Kim, Haojie Ye, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2022ISCAMeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows.Siying Feng, Xin He, Kuan-Yu Chen, Liu Ke, Xuan Zhang, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2022ISCANDMiner: accelerating graph pattern mining using near data processing.Nishil Talati, Haojie Ye, Yichen Yang, Leul Belayneh, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2022ISCASEnabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Yukang Fu, A. Alper Goksoy, Xin He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Yang Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, mit Y. Ogras, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue
2022ISCASImproving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration.Yan Xiong, Jingtao Li, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2022MICROMint: An Accelerator For Mining Temporal Motifs.Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex M. Bronstein, Trevor N. Mudge, Ronald G. Dreslinski
2021DACCoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics.Siying Feng, Jiawen Sun, Subhankar Pal, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski
2021HPCAProdigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design.Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski
2020ICASSPAccelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture.A. Soorishetty, Jian Zhou, Subhankar Pal, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2020ICSSparse-TPU: adapting systolic arrays for sparse matrices.Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge
2020ISCASAccelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture.Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2019ICCDFine-Grained Management of Thread Blocks for Irregular Applications.Jonathan Beaumont, Trevor N. Mudge
2018HPCAOuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator.Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2017ASPLOSNeurosurgeon: Collaborative Intelligence Between the Cloud and Mobile Edge.Yiping Kang, Johann Hauswald, Cao Gao, Austin Rovinski, Trevor N. Mudge, Jason Mars, Lingjia Tang
2017CLUSTERAccelerating Smith-Waterman Alignment Workload with Scalable Vector Computing.Dong-Hyeon Park, Jonathan Beaumont, Trevor N. Mudge
2017ISCAA Programmable Galois Field Processor for the Internet of Things.Yajing Chen, Shengshuo Lu, Cheng Fu, David T. Blaauw, Ronald Dreslinski Jr., Trevor N. Mudge, Hun-Seok Kim
2017MICRORegless: just-in-time operand staging for GPUs.John Kloosterman, Jonathan Beaumont, Davoud Anoushe Jamshidi, Jonathan Bailey, Trevor N. Mudge, Scott A. Mahlke
2016DACNear-threshold computing in FinFET technologies: opportunities for improved voltage scalability.Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2016HPCAA low power software-defined-radio baseband processor for the Internet of Things.Yajing Chen, Shengshuo Lu, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
2016ISLPEDEnhancing DRAM Self-Refresh for Idle Power Reduction.Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge
2015ASPLOSSirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers.Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
2015HiPCThe Architecture of Smart Phones.Trevor N. Mudge
2015ISCADjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers.Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor N. Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang
2015ISPASSA study of mobile device utilization.Cao Gao, Anthony Gutierrez, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu
2015MICROWarpPool: sharing requests with inter-warp coalescing for throughput processors.John Kloosterman, Jonathan Beaumont, Mick Wollman, Ankit Sethia, Ronald G. Dreslinski, Trevor N. Mudge, Scott A. Mahlke
2014ASPLOSIntegrated 3D-stacked server designs for increasing physical density of key-value stores.Anthony Gutierrez, Michael Cieslak, Bharan Giridhar, Ronald G. Dreslinski, Luis Ceze, Trevor N. Mudge
2014DACQuality-of-Service for a High-Radix Switch.Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge
2014DACVIX: Virtual Input Crossbar for Efficient Switch Allocation.Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
2014ICASSPA hybrid approach to offloading mobile image classification.Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge
2014ICSAuthor retrospective improving data cache performance by pre-executing instructions under a cache miss.Trevor N. Mudge
2014ISLPEDA memory rename table to reduce energy and improve performance.Joseph Pusdesris, Benjamin VanderSloot, Trevor N. Mudge
2014ISPASSA study of Thread Level Parallelism on mobile devices.Cao Gao, Anthony Gutierrez, Ronald G. Dreslinski, Trevor N. Mudge, Krisztin Flautner, Geoffrey Blake
2014ISPASSSources of error in full-system simulation.Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver
2014MICROHi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration.Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw
2013HPCAScaling towards kilo-core processors with asymmetric high-radix topologies.Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge
2013ISCASParallelization techniques for implementing trellis algorithms on graphics processors.Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2013SCExploring DRAM organizations for energy-efficient and resilient exascale memories.Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw
2012CASESLazy cache invalidation for self-modifying codes.Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge
2012DACAssessing the performance limits of parallelized near-threshold computing.Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012DACHigh radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service.Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012DACProcess variation in near-threshold wide SIMD architectures.Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge
2011ASPLOSSponge: portable stream programming on graphics engines.Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor N. Mudge, Scott A. Mahlke
2011DATELow power interconnects for SIMD computers.Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2011HPCABloom Filter Guided Transaction Scheduling.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge
2010ASPLOSMacroSS: macro-SIMDization of streaming applications.Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke
2010CASESMighty-morphing power-SIMD.Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Clark, Trevor N. Mudge, Scott A. Mahlke
2010ISCAEvolution of thread-level parallelism in desktop applications.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge, Krisztin Flautner
2010ISLPEDDiet SODA: a power-efficient processor for digital cameras.Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge
2009CGOStream Compilation for Real-Time Embedded Multicore Systems.Yoonseo Choi, Yuan Lin, Nathan Chong, Scott A. Mahlke, Trevor N. Mudge
2009DATEUsing non-volatile memory to save energy in servers.David Roberts, Taeho Kgil, Trevor N. Mudge
2009ISCADisaggregated memory for expansion and sharing in blade servers.Kevin T. Lim, Jichuan Chang, Trevor N. Mudge, Parthasarathy Ranganathan, Steven K. Reinhardt, Thomas F. Wenisch
2009ISCAEnd-to-end performance forecasting: finding bottlenecks before they happen.Ali G. Saidi, Nathan L. Binkert, Steven K. Reinhardt, Trevor N. Mudge
2009ISCAAnySP: anytime anywhere anyway signal processing.Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztin Flautner
2009ISPASSSuiteSpecks and SuiteSpots: A methodology for the automatic conversion of benchmarking programs into intrinsically checkpointed assembly code.Jeff Ringenberg, Trevor N. Mudge
2009MICROProactive transaction scheduling for contention management.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge
2008ICASSPAnalyzing the scalability of SIMD for the next generation software defined radio.Mark Woh, Yuan Lin, Sangwon Seo, Trevor N. Mudge, Scott A. Mahlke
2008ISCAImproving NAND Flash Based Disk Caches.Taeho Kgil, David Roberts, Trevor N. Mudge
2008ISCAUnderstanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments.Kevin T. Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant D. Patel, Trevor N. Mudge, Steven K. Reinhardt
2008ISPASSFull-System Critical Path Analysis.Ali G. Saidi, Nathan L. Binkert, Steven K. Reinhardt, Trevor N. Mudge
2008MICROReconfigurable energy efficient near threshold cache architectures.Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester, Krisztin Flautner
2008MICROFrom SODA to scotch: The evolution of a wireless baseband processor.Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztin Flautner
2007CASESHierarchical coarse-grained stream compilation for software defined radio.Yuan Lin, Manjunath Kudlur, Scott A. Mahlke, Trevor N. Mudge
2007CASESMulticore architectures.Trevor N. Mudge
2007DSDOn-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology.David Roberts, Nam Sung Kim, Trevor N. Mudge
2007ICCADYield-driven near-threshold SRAM design.Gregory K. Chen, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim
2007ISLPEDEnergy efficient near-threshold chip multi-processing.Bo Zhai, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester
2006ASPLOSPicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor.Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztin Flautner
2006CASESFlashCache: a NAND flash memory file cache for low power web servers.Taeho Kgil, Trevor N. Mudge
2006DACReliability modeling and management in dynamic microprocessor-based systems.Eric Karl, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge
2006ISCASODA: A Low-power Architecture For Software Radio.Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztin Flautner
2006ISLPEDReducing idle mode power in software defined radio terminals.Hyunseok Lee, Trevor N. Mudge, Chaitali Chakrabarti
2005ASPDACOpportunities and challenges for better than worst-case design.Todd M. Austin, Valeria Bertacco, David T. Blaauw, Trevor N. Mudge
2005CASESA dual-processor solution for the MAC layer of a software defined radio terminal.Hyunseok Lee, Trevor N. Mudge
2005DATEPower-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage.Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge
2005DATEDVS for On-Chip Bus Designs Based on Timing Error Correction.Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin
2005ICCADTotal power-optimal pipelining and parallel processing under process variations in nanometer technology.Peter Suaris, Taeho Kgil, Keith A. Bowman, Vivek De, Trevor N. Mudge
2005ISPASSPowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis.Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge
2005ISPASSIntrinsic Checkpointing: A Methodology for Decreasing Simulation Time Through Binary Modification.Jeff Ringenberg, Chris Pelosi, David W. Oehmke, Trevor N. Mudge
2005MICROHow to Fake 1000 Registers.David W. Oehmke, Nathan L. Binkert, Trevor N. Mudge, Steven K. Reinhardt
2004DACFITS: framework-based instruction-set tuning synthesis for embedded application specific processors.Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge
2004DACCircuit-aware architectural simulation.Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David T. Blaauw, Trevor N. Mudge
2004HiPCLow Power Robust Computing.Trevor N. Mudge
2004ISLPEDMicroarchitectural power modeling techniques for deep sub-micron microprocessors.Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge
2004ISLPEDReducing pipeline energy demands with local DVS and dynamic retiming.Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David T. Blaauw, Trevor N. Mudge
2003ICCADLeakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches.Nam Sung Kim, David T. Blaauw, Trevor N. Mudge
2003ICSReducing register ports using delayed write-back queues and operand pre-fetch.Nam Sung Kim, Trevor N. Mudge
2003ISLPEDThe microarchitecture of a low power register file.Nam Sung Kim, Trevor N. Mudge
2003MICRORazor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation.Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztin Flautner, Trevor N. Mudge
2002ICCADCombined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads.Steven M. Martin, Krisztin Flautner, Trevor N. Mudge, David T. Blaauw
2002ISCADrowsy Caches: Simple Techniques for Reducing Leakage Power.Krisztin Flautner, Nam Sung Kim, Steven M. Martin, David T. Blaauw, Trevor N. Mudge
2002MICRODrowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction.Nam Sung Kim, Krisztin Flautner, David T. Blaauw, Trevor N. Mudge
2002OSDIVertigo: Automatic Performance-Setting for Linux.Krisztin Flautner, Trevor N. Mudge
2001ICSIntegrating superscalar processor components to implement register caching.Matt Postiff, David A. Greene, Steven E. Raasch, Trevor N. Mudge
2001MOBICOMAutomatic performance setting for dynamic voltage scaling.Krisztin Flautner, Steven K. Reinhardt, Trevor N. Mudge
2000ASPLOSThread Level Parallelism and Interactive Performance of Desktop Applications.Krisztin Flautner, Richard Uhlig, Steven K. Reinhardt, Trevor N. Mudge
2000HiPCPower: A First Class Design Constraint for Future Architecture and Automation.Trevor N. Mudge
2000HPCAReducing Code Size with Run-Time Decompression.Charles Lefurgy, Eva Piccininni, Trevor N. Mudge
2000ISPASSWeb latency reduction via client-side prefetching.Avinoam N. Eden, Brian W. Joh, Trevor N. Mudge
2000MICROThe store-load address table and speculative register promotion.Matt Postiff, David A. Greene, Trevor N. Mudge
1999DACHigh-Level Test Generation for Design Verification of Pipelined Microprocessors.David Van Campenhout, Trevor N. Mudge, John P. Hayes
1999ISCAA Performance Comparison of Contemporary DRAM Architectures.Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor N. Mudge
1999MICROEvaluation of a High Performance Code Compression Method.Charles Lefurgy, Eva Piccininni, Trevor N. Mudge
1998ASPLOSA Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations.Bruce L. Jacob, Trevor N. Mudge
1998MICROThe YAGS Branch Prediction Scheme.Avinoam N. Eden, Trevor N. Mudge
1998WCAEComputer architecture instruction at the University of Michigan.Gary S. Tyson, Steven K. Reinhardt, Trevor N. Mudge
1997HPCASoftware-Managed Address Translation.Bruce L. Jacob, Trevor N. Mudge
1997ICCDInstruction Prefetching Using Branch Prediction Information.I-Cheng K. Chen, Chih-Chieh Lee, Trevor N. Mudge
1997ICCDDesign Optimization for High-speed Per-address Two-level Branch Predictors.I-Cheng K. Chen, Chih-Chieh Lee, Matt Postiff, Trevor N. Mudge
1997ICSImproving Data Cache Performance by Pre-Executing Instructions Under a Cache Miss.James Dundas, Trevor N. Mudge
1997MICROThe bi-Mode Branch Predictor.Chih-Chieh Lee, I-Cheng K. Chen, Trevor N. Mudge
1997MICROImproving Code Density Using Compression Techniques.Charles Lefurgy, Peter L. Bird, I-Cheng K. Chen, Trevor N. Mudge
1996ASPLOSAnalysis of Branch Prediction Via Data Compression.I-Cheng K. Chen, John T. Coffey, Trevor N. Mudge
1996ICCADTiming verification of sequential domino circuits.David Van Campenhout, Trevor N. Mudge, Karem A. Sakallah
1996ISCACorrelation and Aliasing in Dynamic Branch Predictors.Stuart Sechrest, Chih-Chieh Lee, Trevor N. Mudge
1996MICROWrong-path Instruction Prefetching.Jim Pierce, Trevor N. Mudge
1995ISCAInstruction Fetching: Coping with Code Bloat.Richard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest, Joel S. Emer
1995MICROThe role of adaptivity in two-level adaptive branch prediction.Stuart Sechrest, Chih-Chieh Lee, Trevor N. Mudge
1994ASPLOSTrap-driven Simulation with Tapeworm II.Richard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest
1994ASPLOSResource Allocation in a High Clock Rate Microprocessor.Michael Upton, Thomas R. Huff, Trevor N. Mudge, Richard B. Brown
1994ISCAOptimal Allocation of On-Chip Memory for Multiple-API Operating Systems.David Nagle, Richard Uhlig, Trevor N. Mudge, Stuart Sechrest
1994MASCOTSIDtrace - A Tracing Tool for i486 Simulation.Jim Pierce, Trevor N. Mudge
1994MICROA comparison of two pipeline organizations.Michael Golden, Trevor N. Mudge
1994SIGMETRICSKernel-Based Memory Simulation.Richard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest
1993ISCADesign Tradeoffs for Software-Managed TLBs.David Nagle, Richard Uhlig, Tim J. Stanley, Stuart Sechrest, Trevor N. Mudge, Richard B. Brown
1993MICROA microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus.Tim J. Stanley, Michael Upton, Patrick Sherhart, Trevor N. Mudge, Richard B. Brown
1992ICCADIdentification of critical paths in circuits with level-sensitive latches.Timothy M. Burks, Karem A. Sakallah, Trevor N. Mudge
1992ISCAPerformance Optimization of Pipelined Primary Caches.Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
1991ICCDOptimal Clocking of Circular Pipelines.Karem A. Sakallah, Trevor N. Mudge, Timothy M. Burks, Edward S. Davidson
1991ISCAImplementing a Cache for a High-Performance GaAs Microprocessor.Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
1990DACAnalysis and Design of Latch-Controlled Synchronous Digital Circuits.Karem A. Sakallah, Trevor N. Mudge, Kunle Olukotun
1990ICCADUntitled recordKarem A. Sakallah, Trevor N. Mudge, Kunle Olukotun
1988ISCAAnalysis of Bus Hierarchies for Multiprocessors.Donald C. Winsor, Trevor N. Mudge
1987DACA Preliminary Investigation into Parallel Routing on a Hypercube Computer.Kunle Olukotun, Trevor N. Mudge
1987ICPPCrosspoint Cache Architectures.Donald C. Winsor, Trevor N. Mudge
1987ICRATwo-dimensional partially visible object recognition using efficient multidimensional range queries.Paul G. Gottschalk, Jerry L. Turney, Trevor N. Mudge
1987ICRARange image segmentation and surface parameter extraction for 3-D object recognition of industrial parts.Joonhee Han, Richard A. Volz, Trevor N. Mudge
1986ICPPArchitecture of a Hypercube Supercomputer.John P. Hayes, Trevor N. Mudge, Quentin F. Stout
1986RTSSInstruction Level Mechanisms for Accurate Real-time Task Scheduling.Richard A. Volz, Trevor N. Mudge
1985ICPPA Semi-Markov Model for the Performance of Multiple-Bus Systems.Trevor N. Mudge, Humoud B. Al-Sadoun
1985ICRARecognizing partially hidden objects.Jerry L. Turney, Trevor N. Mudge, Richard A. Volz
1984WSCHierarchical decomposition and simulation of manufacturing cells.Charles J. Antonelli, Richard A. Volz, Trevor N. Mudge
1983ICPPEfficiency of Feature Dependent Algorithms for the Parallel Processing of Images.Trevor N. Mudge, Abdel-Rahman H. Tawil
1982DACCellular image processing techniques for VLSI circuit layout validation and routing.Trevor N. Mudge, Rob A. Rutenbar, Robert M. Lougheed, Daniel E. Atkins
1982ICDCSAn Approximate Queueing Model for Packet Switched Multistage Interconnection Networks.Trevor N. Mudge, B. A. Makrucki
1982ISCAProbabilistic analysis of a crossbar switch.Trevor N. Mudge, B. A. Makrucki