Skip to content

Vasilis F. Pavlidis

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

27

Venues

8

Active years

2003–2026

Best venue rank

C

Where they publish

Papers

27 indexed papers, newest first.

YearVenueTitleAuthors
2026DATESensor Placement and Transformer-Based Thermal Map Generation for Reusable Interposers.Aristotelis Tsekouras, Theodoros Papavasileiou, Panagiotis C. Petrantonakis, Georgios Keramidas, Vasilis F. Pavlidis
2025DATEA Comprehensive Inductance-Aware Modeling Approach to Power Distribution Network in Heterogeneous 3D Integrated Circuits.Quansen Wang, Vasilis F. Pavlidis, Yuanqing Cheng
2025ICCADVLSI Design and Experimental Demonstration of Photonic Interposers in Thin-Film Lithium Niobate.Georgios Kyriazidis, Aristotelis Tsekouras, John Davis, Vasilis F. Pavlidis, Gage Hills
2024ICCADOCTS: An Optical Clock Tree Synthesis Methodology for 2.5D Systems.Aristotelis Tsekouras, Georgios Kyriazidis, Gage Hills, Vasilis F. Pavlidis
2024ICCADARO: Autoregressive Operator Learning for Transferable and Multi-fidelity 3D-IC Thermal Analysis With Active Learning.Mingyue Wang, Yuanqing Cheng, Weiheng Zeng, Zhenjie Lu, Vasilis F. Pavlidis, Wei Xing
2022ISCASMitigating EM Side-Channel Attacks with Dynamic Delay Insertion and Data Bus Inversion.Minmin Jiang, Eleni Maragkoudaki, Vasilis F. Pavlidis
2021ASPDACTemperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators.Prachi Shukla, Sean S. Nemtzow, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
2019DATEAdaptive Word Reordering for Low-Power Inter-Chip Communication.Eleni Maragkoudaki, Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2019DATEAdaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs.Chao Zhang, Milan Mihajlovic, Vasilis F. Pavlidis
2019FPGAPVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs.Konstantinos Maragos, George Lentaris, Dimitrios Soudris, Vasilis F. Pavlidis
2019ICCDEfficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits.Charalampos Antoniadis, Milan Mihajlovic, Nestor E. Evmorfopoulos, Georgios I. Stamoulis, Vasilis F. Pavlidis
2018ISCASMismatch Compensation Technique for Inverter-Based CMOS Circuits.Przemyslaw Mroszczyk, Vasilis F. Pavlidis
2017DATEApplication performance improvement by exploiting process variability on FPGA devices.Konstantinos Maragos, George Lentaris, Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis
2017ICCADComputationally efficient standard-cell FEM-based thermal analysis.Yi-Chung Chen, Scott Ladenheim, Harry Kalargaris, Milan Mihajlovic, Vasilis F. Pavlidis
2017ISCASContactless inter-tier communication for heterogeneous 3-D ICs.Ioannis A. Papistas, Vasilis F. Pavlidis
2016ICCADIC thermal analyzer for versatile 3-D structures using multigrid preconditioned krylov methods.Scott Ladenheim, Yi-Chung Chen, Milan Mihajlovic, Vasilis F. Pavlidis
2016ISCASCrosstalk noise effects of on-chip inductive links on power delivery networks.Ioannis A. Papistas, Vasilis F. Pavlidis
2013ISCAS3.5-D integration: A case study.Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli
2012DATEVoltage propagation method for 3-D power grid analysis.Cheng Zhang, Vasilis F. Pavlidis, Giovanni De Micheli
2012ETSEnhanced wafer matching heuristics for 3-D ICs.Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli
2011DATEAnalytical heat transfer model for thermal through-silicon vias.Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011ISCASClock distribution models of 3-D integrated systems.Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman
2011ISCASSkew variability in 3-D ICs with multiple clock domains.Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2009DATEA software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs.Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris
2007FPLExploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support.Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris
2006ISCASVia placement for minimum interconnect delay in three-dimensional (3D) circuits.Vasilis F. Pavlidis, Eby G. Friedman
2003ISCASA methodology for implementing FIR filters and CAD tool development for designing RNS-based systems.Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis