Vivekananda M. Vedula
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
4
Active years
2002–2007
Best venue rank
National
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | VLSID | Controllability-driven Power Virus Generation for Digital Circuits. | K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekananda M. Vedula |
| 2007 | VTS | Power Virus Generation Using Behavioral Models of Circuits. | K. Najeeb, Vishnu Vardhan Reddy Konda, Siva Kumar Sastry Hari, V. Kamakoti, Vivekananda M. Vedula |
| 2004 | VLSID | Program Slicing for ATPG-Based Property Checking. | Vivekananda M. Vedula, Whitney J. Townsend, Jacob A. Abraham |
| 2003 | VLSID | Formal Verification Using Bounded Model Checking: SAT versus Sequential ATPG Engines. | Daniel G. Saab, Jacob A. Abraham, Vivekananda M. Vedula |
| 2002 | DATE | FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis. | Vivekananda M. Vedula, Jacob A. Abraham |
| 2002 | ITC | Verifying Properties Using Sequential ATPG. | Jacob A. Abraham, Vivekananda M. Vedula, Daniel G. Saab |
| 2002 | VTS | Program Slicing for Hierarchical Test Generation. | Vivekananda M. Vedula, Jacob A. Abraham, Jayanta Bhadra |