| 2026 | ASPDAC | Enhancing Trustworthiness with Mixed Precision: Benchmarks, Opportunities, and Challenges. | Guanxi Lu, Hao Mark Chen, Zhiqiang Que, Wayne Luk, Hongxiang Fan |
| 2026 | ASPLOS | FastTTS: Accelerating Test-Time Scaling for Edge LLM Reasoning. | Hao Mark Chen, Zhiwen Mo, Guanxi Lu, Shuang Liang, Lingxiao Ma, Wayne Luk, Hongxiang Fan |
| 2026 | FCCM | SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization. | Guoyu Li, Yang Cao, Lucas H. L. Ng, Alexander Charlton, Qianzhou Wang, Will Punter, Philippos Papaphilippou, Ce Guo, Hongxiang Fan, Wayne Luk, Saman P. Amarasinghe, Ajay Brahmakshatriya |
| 2026 | FCCM | EDSSC: An Efficient FPGA-based Accelerator for Dynamic Sparse Spectral Clustering. | Zhengyan Liu, Ce Guo, Zehuan Zhang, Qiang Liu, Wayne Luk |
| 2026 | FCCM | HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference. | Chang Sun, Zhiqiang Que, Bakhtiar Zadeh, Qibin Liu, Kevin H. Alvarez, Wayne Luk, Maria Spiropulu |
| 2026 | FCCM | Towards Small Language Models on FPGAs. | Filip Wojcicki, Omar Sharif, Ebby Samson, Paul H. J. Kelly, George A. Constantinides, Christos Bouganis, Wayne Luk |
| 2026 | FPGA | CODESCA: Co-Design for Spectral Clustering Acceleration. | Zhengyan Liu, Ce Guo, Zehuan Zhang, Qiang Liu, Wayne Luk |
| 2026 | FPGA | HGQ: High Granularity Quantization for Real-time Neural Networks on FPGAs. | Chang Sun, Zhiqiang Que, Thea Aarrestad, Vladimir Loncar, Jennifer Ngadiuba, Wayne Luk, Maria Spiropulu |
| 2026 | HPCA | Advancing Full-Stack Acceleration for SchrDinger-Style Quantum Simulation. | Shuang Liang, Yuncheng Lu, Ce Guo, Paul H. J. Kelly, Wayne Luk, Hongxiang Fan |
| 2026 | ISCA | Coset Ensemble Decoder for Quantum Error Correction with Algorithm-Hardware Co-Design. | Shuang Liang, Jubo Xu, Giulio Bassanino, Qianzhou Wang, Yidong Zhou, Yuncheng Lu, Zhiwen Mo, Paul H. J. Kelly, Bo Yuan, Wayne Luk, Hongxiang Fan |
| 2026 | ISCA | Combating the Memory Walls: Optimization Pathways for Long-Context Agentic Llm Inference. | Haoran Wu, Can Xiao, Jiayi Nie, Xuan Guo, Binglei Lou, Jeffrey T. H. Wong, Zhiwen Mo, Cheng Zhang, Przemyslaw Forys, Chengyang Ai, Timi Adeniran, Wayne Luk, Hongxiang Fan, Jianyi Cheng, Timothy M. Jones, Rika Antonova, Robert Mullins, Aaron Zhao |
| 2026 | PAKDD | VCDF: A Validated Consensus-Driven Framework for Time Series Causal Discovery. | Gene Yu, Ce Guo, Wayne Luk |
| 2025 | DAC | Enhancing LLM-based Quantum Code Generation with Multi-Agent Optimization and Quantum Error Correction. | Charlie Campbell, Hao Mark Chen, Wayne Luk, Hongxiang Fan |
| 2025 | DAC | Versatile Cross-platform Compilation Toolchain for Schrdinger-style Quantum Circuit Simulation. | Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly |
| 2025 | EMNLP | Hardware-Aware Parallel Prompt Decoding for Memory-Efficient Acceleration of LLM Inference. | Hao Mark Chen, Wayne Luk, Yiu Ka Fai Cedric, Rui Li, Konstantin Mishchenko, Stylianos I. Venieris, Hongxiang Fan |
| 2025 | FCCM | Efficient Adaptable Streaming Aggregation Engine. | Philippos Papaphilippou, Wayne Luk, David Gregg |
| 2025 | FPL | Aspo: Constraint-Aware Bayesian Optimization for Fpga-Based Soft Processors. | Haoran Wu, Ce Guo, Wayne Luk, Robert Mullins |
| 2025 | ICCV | FW-Merging: Scaling Model Merging with Frank-Wolfe Optimization. | Hao Mark Chen, Shell Xu Hu, Wayne Luk, Timothy M. Hospedales, Hongxiang Fan |
| 2024 | DAC | Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGA. | Zehuan Zhang, Hongxiang Fan, Hao Mark Chen, Lukasz Dudziak, Wayne Luk |
| 2024 | FCCM | PCQ: Parallel Compact Quantum Circuit Simulation. | Shuang Liang, Yuncheng Lu, Ce Guo, Wayne Luk, Paul H. J. Kelly |
| 2024 | FPL | Exploring FPGA designs for MX and beyond. | Ebby Samson, Naveen Mellempudi, Wayne Luk, George A. Constantinides |
| 2024 | ISCA | Circular Reconfigurable Parallel Processor for Edge Computing : Industrial Product ✶. | Yuan Li, Jianbin Zhu, Yao Fu, Yu Lei, Toshio Nagata, Ryan Braidwood, Haohuan Fu, Juepeng Zheng, Wayne Luk, Hongxiang Fan |
| 2023 | DAC | When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA. | Hongxiang Fan, Mark Chen, Liam Castelli, Zhiqiang Que, He Li, Kenneth Long, Wayne Luk |
| 2023 | DAC | Heterogeneous Reconfigurable Accelerators: Trends and Perspectives. | Wayne Luk |
| 2023 | FPL | FPGA-Accelerated Causal Discovery with Conditional Independence Test Prioritization. | Ce Guo, Diego Cupello, Wayne Luk, Joshua M. Levine, Alexander Warren, Peter Brookes |
| 2023 | FPL | MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration. | Zhiqiang Que, Shuo Liu, Markus Rognlien, Ce Guo, Jos Gabriel F. Coutinho, Wayne Luk |
| 2022 | ASPDAC | Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. | Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk |
| 2022 | DAC | Enabling fast uncertainty estimation: accelerating bayesian transformers via algorithmic and hardware optimizations. | Hongxiang Fan, Martin Ferianc, Wayne Luk |
| 2022 | DAC | Optimizing quantum circuit placement via machine learning. | Hongxiang Fan, Ce Guo, Wayne Luk |
| 2022 | FCCM | Mixed-Resource Parallel Processing on FPGAs. | Stewart Denholm, Wayne Luk |
| 2022 | FPGA | Accelerating Constraint-Based Causal Discovery by Shifting Speed Bottleneck. | Ce Guo, Wayne Luk |
| 2022 | FPL | A Unified Approach for Managing Heterogeneous Processing Elements on FPGAs. | Stewart Denholm, Wayne Luk |
| 2022 | FPL | Optimizing Graph Neural Networks for Jet Tagging in Particle Physics on FPGAs. | Zhiqiang Que, Marcus Loo, Hongxiang Fan, Maurizio Pierini, Alexander D. Tapper, Wayne Luk |
| 2022 | FPL | POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations. | Ruizhe Zhao, Jianyi Cheng, Wayne Luk, George A. Constantinides |
| 2022 | ISCAS | Maximising Parallel Memory Access for Low Latency FPGA Designs. | Stewart Denholm, Wayne Luk |
| 2022 | ISCAS | Customizable FPGA-based Accelerator for Binarized Graph Neural Networks. | Ziwei Wang, Zhiqiang Que, Wayne Luk, Hongxiang Fan |
| 2022 | MICRO | Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design. | Hongxiang Fan, Thomas Chau, Stylianos I. Venieris, Royson Lee, Alexandros Kouris, Wayne Luk, Nicholas D. Lane, Mohamed S. Abdelfattah |
| 2021 | DAC | High-Performance FPGA-based Accelerator for Bayesian Neural Networks. | Hongxiang Fan, Martin Ferianc, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, Wayne Luk |
| 2021 | DATE | Accelerating Fully Spectral CNNs with Adaptive Activation Functions on FPGA. | Shuanglong Liu, Hongxiang Fan, Wayne Luk |
| 2021 | FCCM | Flexible Instrumentation for Live On-Chip Debug of Machine Learning Training on FPGAs. | Daniel Holanda Noronha, Zhiqiang Que, Wayne Luk, Steven J. E. Wilton |
| 2021 | FCCM | Systematically migrating an operational microphysics parameterisation to FPGA technology. | James Stanley Targett, Wayne Luk, Michael Lange, Olivier Marsden |
| 2021 | FPGA | Reconfigurable Acceleration of Short Read Mapping with Biological Consideration. | Ho-Cheung Ng, Izaak Coleman, Shuanglong Liu, Wayne Luk |
| 2021 | FPL | Demonstrating custom SIMD instruction development for a RISC-V softcore. | Philippos Papaphilippou, Paul H. J. Kelly, Wayne Luk |
| 2021 | FPL | Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions. | Philippos Papaphilippou, Paul H. J. Kelly, Wayne Luk |
| 2021 | ICCD | Efficient Table-Based Polynomial on FPGA. | Marco Barbone, Bas W. Kwaadgras, Uwe Oelfke, Wayne Luk, Georgi Gaydadjiev |
| 2021 | ICWSM | Can We Stop Fake News? Using Agent-Based Modelling to Evaluate Countermeasures for Misinformation on Social Media. | Anna Gausen, Wayne Luk, Ce Guo |
| 2021 | SBAC-PAD | Efficient Online 4D Magnetic Resonance Imaging. | Marco Barbone, Andreas Wetscherek, Thomas Yung, Uwe Oelfke, Wayne Luk, Georgi Gaydadjiev |
| 2020 | AICCSA | Accelerating Simulation for Agent-based Epidemic Models using FPGAs. | Ce Guo, Wayne Luk, Stephen Weston |
| 2020 | FCCM | High-Throughput Convolutional Neural Network on an FPGA by Customized JPEG Compression. | Hiroki Nakahara, Zhiqiang Que, Wayne Luk |
| 2020 | FCCM | Optimizing Reconfigurable Recurrent Neural Networks. | Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Xinyu Niu, Wayne Luk |
| 2020 | FCCM | Artisan: a Meta-Programming Approach For Codifying Optimisation Strategies. | Jessica Vandebon, Jos Gabriel F. Coutinho, Wayne Luk, Eriko Nurvitadhi, Tim Todman |
| 2020 | FPGA | R2CNN: Recurrent Residual Convolutional Neural Network on FPGA. | Hiroki Nakahara, Zhiqiang Que, Akira Jinguji, Wayne Luk |
| 2020 | FPGA | High-Performance FPGA Network Switch Architecture. | Philippos Papaphilippou, Jiuxi Meng, Wayne Luk |
| 2020 | FPGA | Performance Portable FPGA Design. | Nils Voss, Tobias Becker, Simon Tilbury, Georgi Gaydadjiev, Oskar Mencer, Anna Maria Nestorov, Enrico Reggiani, Wayne Luk |
| 2020 | FPL | An Adaptable High-Throughput FPGA Merge Sorter for Accelerating Database Analytics. | Philippos Papaphilippou, Chris Brooks, Wayne Luk |
| 2020 | ICCD | Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search. | Hongxiang Fan, Martin Ferianc, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
| 2020 | IJCAI | Reducing Underflow in Mixed Precision Training by Gradient Scaling. | Ruizhe Zhao, Brian Vogel, Tanvir Ahmed, Wayne Luk |
| 2020 | PLDI | On the challenges in programming mixed-precision deep neural networks. | Ruizhe Zhao, Wayne Luk, Chao Xiong, Xinyu Niu, Kuen Hung Tsoi |
| 2019 | FCCM | Towards Efficient Deep Neural Network Training by FPGA-Based Batch-Level Parallelism. | Cheng Luo, Man-Kit Sit, Hongxiang Fan, Shuanglong Liu, Wayne Luk, Ce Guo |
| 2019 | FCCM | Memory Mapping for Multi-die FPGAs. | Nils Voss, Pablo Quintana, Oskar Mencer, Wayne Luk, Georgi Gaydadjiev |
| 2019 | FPGA | On-chip FPGA Debug Instrumentation for Machine Learning Applications. | Daniel Holanda Noronha, Ruizhe Zhao, Jeffrey Goeders, Wayne Luk, Steven J. E. Wilton |
| 2019 | FPL | Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs. | Shuanglong Liu, Wayne Luk |
| 2019 | FPL | Accelerating the Merge Phase of Sort-Merge Join. | Philippos Papaphilippou, Holger Pirk, Wayne Luk |
| 2019 | ICCAD | Towards In-Circuit Tuning of Deep Learning Designs. | Zhiqiang Que, Daniel Holanda Noronha, Ruizhe Zhao, Steven J. E. Wilton, Wayne Luk |
| 2019 | IGARSS | Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification. | Ringo S. W. Chu, Ho-Cheung Ng, Xiwei Wang, Wayne Luk |
| 2018 | FCCM | Performance Prediction for Large-Scale Heterogeneous Platforms. | Ryota Yasudo, Ana Lucia Varbanescu, Jos Gabriel F. Coutinho, Wayne Luk, Hideharu Amano |
| 2018 | FPGA | A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only. | Shuanglong Liu, Xinyu Niu, Wayne Luk |
| 2018 | FPGA | ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development. | Ho-Cheung Ng, Shuanglong Liu, Wayne Luk |
| 2018 | FPGA | Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only). | Ruizhe Zhao, Xinyu Niu, Wayne Luk |
| 2018 | FPL | CRRS: Custom Regression and Regularisation Solver for Large-Scale Linear Systems. | Andreea-Ingrid Cross, Liucheng Guo, Wayne Luk, Mark Salmon |
| 2018 | FPL | Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. | Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
| 2018 | FPL | Accelerating Database Systems Using FPGAs: A Survey. | Philippos Papaphilippou, Wayne Luk |
| 2018 | FPL | Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. | Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu |
| 2017 | FCCM | A Nanosecond-Level Hybrid Table Design for Financial Market Data Generators. | Haohuan Fu, Conghui He, Wayne Luk, Weijia Li, Guangwen Yang |
| 2017 | FPGA | Accelerating Financial Market Server through Hybrid List Design (Abstract Only). | Haohuan Fu, Conghui He, Huabin Ruan, Itay Greenspon, Wayne Luk, Yongkang Zheng, Junfeng Liao, Qing Zhang, Guangwen Yang |
| 2017 | FPL | F-C3D: FPGA-based 3-dimensional convolutional neural network. | Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk |
| 2017 | FPL | Exploring the potential of reconfigurable platforms for order book update. | Conghui He, Haohuan Fu, Wayne Luk, Weijia Li, Guangen Yang |
| 2017 | FPL | Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts. | Ho-Cheung Ng, Shuanglong Liu, Wayne Luk |
| 2017 | FPL | Customised pearlmutter propagation: A hardware architecture for trust region policy optimisation. | Shengjia Shao, Wayne Luk |
| 2017 | FPL | Validating optimisations for chaotic simulations. | James Stanley Targett, Peter D. Dben, Wayne Luk |
| 2017 | ICCD | Convolutional Neural Networks on Dataflow Engines. | Nils Voss, Marco Bacis, Oskar Mencer, Georgi Gaydadjiev, Wayne Luk |
| 2016 | ADBIS | Hashing-Based Approximate DBSCAN. | Tianrun Li, Thomas Heinis, Wayne Luk |
| 2016 | FCCM | Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs. | Maciej Kurek, Marc Peter Deisenroth, Wayne Luk, Timothy John Todman |
| 2016 | FPGA | CASK: Open-Source Custom Architectures for Sparse Kernels. | Paul Grigoras, Pavel Burovskiy, Wayne Luk |
| 2016 | FPL | Optimising Sparse Matrix Vector multiplication for large scale FEM problems on FPGA. | Paul Grigoras, Pavel Burovskiy, Wayne Luk, Spencer J. Sherwin |
| 2016 | FPL | EURECA compilation: Automatic optimisation of cycle-reconfigurable circuits. | Xinyu Niu, Nicholas Ng, Tomofumi Yuki, Shaojun Wang, Nobuko Yoshida, Wayne Luk |
| 2016 | FPL | Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules. | Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk |
| 2015 | DAC | In-circuit temporal monitors for runtime verification of reconfigurable designs. | Tim Todman, Stephan Stilkerich, Wayne Luk |
| 2015 | FCCM | Accelerating SpMV on FPGAs by Compressing Nonzero Values. | Paul Grigoras, Pavel Burovskiy, Eddie Hung, Wayne Luk |
| 2015 | FCCM | Pipelined Genetic Propagation. | Liucheng Guo, Ce Guo, David B. Thomas, Wayne Luk |
| 2015 | FCCM | Architectures and Precision Analysis for Modelling Atmospheric Variables with Chaotic Behaviour. | Francis P. Russell, Peter D. Dben, Xinyu Niu, Wayne Luk, Tim N. Palmer |
| 2015 | FPGA | Ramethy: Reconfigurable Acceleration of Bisulfite Sequence Alignment. | James Arram, Wayne Luk, Peiyong Jiang |
| 2015 | FPGA | Delay-Bounded Routing for Shadow Registers. | Eddie Hung, Joshua M. Levine, Edward A. Stott, George A. Constantinides, Wayne Luk |
| 2015 | FPGA | EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access. | Xinyu Niu, Wayne Luk, Yu Wang |
| 2015 | FPL | Efficient assembly for high order unstructured FEM meshes. | Pavel Burovskiy, Paul Grigoras, Spencer J. Sherwin, Wayne Luk |
| 2015 | FPL | Preface. | Peter Y. K. Cheung, Wayne Luk, Cristina Silvano |
| 2015 | FPL | Significant papers from the first 25 years of the FPL conference. | Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, Joo M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang |
| 2015 | FPL | Recursive pipelined genetic propagation for bilevel optimisation. | Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston |
| 2015 | ICRA | GPU-based proximity query processing on unstructured triangular mesh model. | Kit-Hang Lee, Ziyan Guo, Gary C. T. Chow, Yue Chen, Wayne Luk, Ka-Wai Kwok |
| 2014 | FCCM | SMCGen: Generating Reconfigurable Design for Sequential Monte Carlo Applications. | Thomas C. P. Chau, Maciej Kurek, James Stanley Targett, Jake Humphrey, Georgios Skouroupathis, Alison Eele, Jan M. Maciejowski, Benjamin Cope, Kathryn Cobden, Philip Heng Wai Leong, Peter Y. K. Cheung, Wayne Luk |
| 2014 | FCCM | Automating Optimization of Reconfigurable Designs. | Maciej Kurek, Tobias Becker, Thomas C. P. Chau, Wayne Luk |
| 2014 | FPGA | Accelerating parameter estimation for multivariate self-exciting point processes. | Ce Guo, Wayne Luk |
| 2014 | FPL | Dataflow acceleration of Krylov subspace sparse banded problems. | Pavel Burovskiy, Stephen Girdlestone, Craig Davies, Spencer J. Sherwin, Wayne Luk |
| 2014 | FPL | An efficient sparse conjugate gradient solver using a Beneš permutation network. | Gary C. T. Chow, Paul Grigoras, Pavel Burovskiy, Wayne Luk |
| 2014 | FPL | A highly-efficient and green data flow engine for solving euler atmospheric equations. | Lin Gan, Haohuan Fu, Chao Yang, Wayne Luk, Wei Xue, Oskar Mencer, Xiaomeng Huang, Guangwen Yang |
| 2014 | FPL | Automated framework for FPGA-based parallel genetic algorithms. | Liucheng Guo, David B. Thomas, Ce Guo, Wayne Luk |
| 2014 | FPL | Transparent insertion of latency-oblivious logic onto FPGAs. | Eddie Hung, Tim Todman, Wayne Luk |
| 2014 | FPL | Particle filtering-based Maximum Likelihood Estimation for financial parameter estimation. | Jinzhe Yang, Binghuan Lin, Wayne Luk, Terence Nahar |
| 2014 | FPL | Patra: Parallel tree-reweighted message passing architecture. | Wenlai Zhao, Haohuan Fu, Guangwen Yang, Wayne Luk |
| 2014 | ICCD | HW/SW partitioning for region-based dynamic partial reconfigurable FPGAs. | Yuchun Ma, Jinglan Liu, Chao Zhang, Wayne Luk |
| 2014 | ICMLA | A Hybrid Genetic-Programming Swarm-Optimisation Approach for Examining the Nature and Stability of High Frequency Trading Strategies. | Andreea-Ingrid Funie, Mark Salmon, Wayne Luk |
| 2014 | ISPA | Elastic Management of Reconfigurable Accelerators. | Paul Grigoras, Max Tottenham, Xinyu Niu, Jos Gabriel F. Coutinho, Wayne Luk |
| 2014 | ISPA | FPGA-Based Design Using the FASTER Toolchain: The Case of STM Spear Development Board. | Fabrizio Spada, Alberto Scolari, Gianluca C. Durelli, Riccardo Cattaneo, Marco D. Santambrogio, Donatella Sciuto, Dionisios N. Pnevmatikatos, Georgi Gaydadjiev, Oliver Pell, Andreas Brokalakis, Wayne Luk, Dirk Stroobandt, Danilo Pau |
| 2013 | FCCM | Reconfigurable Acceleration of Short Read Mapping. | James Arram, Kuen Hung Tsoi, Wayne Luk, Peiyong Jiang |
| 2013 | FCCM | Global Atmospheric Simulation on a Reconfigurable Platform. | Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Guangwen Yang |
| 2013 | FCCM | Automating Elimination of Idle Functions by Run-Time Reconfiguration. | Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu |
| 2013 | FCCM | An FPGA-Based Data Flow Engine for Gaussian Copula Model. | Huabin Ruan, Xiaomeng Huang, Haohuan Fu, Guangwen Yang, Wayne Luk, Sbastien Racanire, Oliver Pell, Wenjing Han |
| 2013 | FPGA | Automating resource optimisation in reconfigurable design (abstract only). | Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu |
| 2013 | FPL | Accelerating solvers for global atmospheric equations through mixed-precision data flow engine. | Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Xiaomeng Huang, Youhui Zhang, Guangwen Yang |
| 2013 | FPL | Accelerating maximum likelihood estimation for Hawkes point processes. | Ce Guo, Wayne Luk |
| 2013 | FPL | A scalable design approach for stencil computation on reconfigurable clusters. | Xinyu Niu, Jos Gabriel F. Coutinho, Wayne Luk |
| 2013 | FPL | Runtime assertions and exceptions for streaming systems. | Tim Todman, Wayne Luk |
| 2013 | ICPP | A Heterogeneous Computing Framework for Computational Finance. | Gordon Inggs, David B. Thomas, Wayne Luk |
| 2013 | SEFM | Scalable Session Programming for Heterogeneous High-Performance Systems. | Nicholas Ng, Nobuko Yoshida, Wayne Luk |
| 2012 | DSD | Controlling Hardware Synthesis with Aspects. | Joo M. P. Cardoso, Tiago Carvalho, Jos Gabriel F. Coutinho, Pedro C. Diniz, Zlatko Petrov, Wayne Luk |
| 2012 | DSD | FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. | Dionisios N. Pnevmatikatos, Tobias Becker, Andreas Brokalakis, Karel Bruneel, Georgi Gaydadjiev, Wayne Luk, Kyprianos Papadimitriou, Ioannis Papaefstathiou, Oliver Pell, Christian Pilato, M. Robart, Marco D. Santambrogio, Donatella Sciuto, Dirk Stroobandt, Tim Todman |
| 2012 | FCCM | Specifying Compiler Strategies for FPGA-based Systems. | Joo M. P. Cardoso, Joo Teixeira, Jos C. Alves, Ricardo Nobre, Pedro C. Diniz, Jos Gabriel F. Coutinho, Wayne Luk |
| 2012 | FCCM | A Mixed Precision Methodology for Mathematical Optimisation. | Gary C. T. Chow, Wayne Luk, Philip Heng Wai Leong |
| 2012 | FPGA | A mixed precision Monte Carlo methodology for reconfigurable accelerator systems. | Gary Chun Tak Chow, Anson Hong Tak Tse, Qiwei Jin, Wayne Luk, Philip Heng Wai Leong, David B. Thomas |
| 2012 | FPL | Parallel FPGA-based all pairs shortest paths for sparse networks: A human brain connectome case study. | Brahim Betkaoui, Yu Wang, David B. Thomas, Wayne Luk |
| 2012 | FPL | Adaptive Sequential Monte Carlo approach for real-time applications. | Thomas C. P. Chau, Wayne Luk, Peter Y. K. Cheung, Alison Eele, Jan M. Maciejowski |
| 2012 | FPL | Optimising explicit finite difference option pricing for dynamic constant reconfiguration. | Qiwei Jin, Tobias Becker, Wayne Luk, David B. Thomas |
| 2012 | FPL | Detecting power attacks on reconfigurable hardware. | Adrien Le Masle, Wayne Luk |
| 2012 | FPL | Exploiting run-time reconfiguration in stencil computation. | Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell |
| 2012 | FPL | Verification of streaming designs by combining symbolic simulation and equivalence checking. | Tim Todman, Wayne Luk |
| 2012 | ICANN | A Large-Scale Spiking Neural Network Accelerator for FPGA Systems. | Kit Cheung, Simon R. Schultz, Wayne Luk |
| 2011 | FCCM | Mixed Precision Processing in Reconfigurable Systems. | Gary Chun Tak Chow, K. W. Kwok, Wayne Luk, Philip Heng Wai Leong |
| 2011 | FCCM | On Comparing Financial Option Price Solvers on FPGA. | Qiwei Jin, Wayne Luk, David B. Thomas |
| 2011 | FPGA | A comparison of FPGAs, GPUS and CPUS for Smith-Waterman algorithm (abstract only). | Yoshiki Yamaguchi, Kuen Hung Tsoi, Wayne Luk |
| 2011 | FPL | Unifying Finite Difference Option-Pricing for Hardware Acceleration. | Qiwei Jin, Wayne Luk, David B. Thomas |
| 2011 | FPL | Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking. | Xinyu Niu, Kuen Hung Tsoi, Wayne Luk |
| 2011 | ILP | Customisable Multi-Processor Acceleration of Inductive Logic Programming. | Andreas Kirkeby Fidjeland, Wayne Luk, Stephen H. Muggleton |
| 2010 | DATE | Combining optimizations in automated low power design. | Qiang Liu, Tim Todman, Wayne Luk |
| 2010 | DATE | Exploration of hardware sharing for image encoders. | Sebastin Lpez, Roberto Sarmiento, Philip G. Potter, Wayne Luk, Peter Y. K. Cheung |
| 2010 | DSD | Customizable Composition and Parameterization of Hardware Design Transformations. | Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides |
| 2010 | FCCM | Energy-Aware Optimisation for Run-Time Reconfiguration. | Tobias Becker, Wayne Luk, Peter Y. K. Cheung |
| 2010 | FCCM | A Scripting Engine for Combining Design Transformations. | Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides |
| 2010 | FPGA | Axel: a heterogeneous cluster with FPGAs and GPUs. | Kuen Hung Tsoi, Wayne Luk |
| 2010 | FPL | A Karatsuba-Based Montgomery Multiplier. | Gary Chun Tak Chow, Ken Eguro, Wayne Luk, Philip Heng Wai Leong |
| 2010 | FPL | FPGA-Optimised Uniform Random Number Generators Using LUTs and Shift Registers. | David B. Thomas, Wayne Luk |
| 2010 | FPL | Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options. | Anson H. T. Tse, David B. Thomas, Kuen Hung Tsoi, Wayne Luk |
| 2010 | FPL | Run-Time Reconfiguration for a Reconfigurable Algorithmic Trading Engine. | Stephen Wray, Wayne Luk, Peter R. Pietzuch |
| 2010 | ISCAS | Automated placement of reconfigurable regions for relocatable modules. | Tobias Becker, Markus Koester, Wayne Luk |
| 2009 | DATE | Design optimizations to improve placeability of partial reconfiguration modules. | Markus Koester, Wayne Luk, Jens Hagemeyer, Mario Porrmann |
| 2009 | DATE | Partition-based exploration for reconfigurable JPEG designs. | Philip G. Potter, Wayne Luk, Peter Y. K. Cheung |
| 2009 | FCCM | Benchmarking Reconfigurable Architectures in the Mobile Domain. | Peter Jamieson, Tobias Becker, Wayne Luk, Peter Y. K. Cheung, Tero Rissa, Teemu Pitknen |
| 2009 | FCCM | FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks. | David B. Thomas, Wayne Luk |
| 2009 | FCCM | Accelerating Quadrature Methods for Option Valuation. | Anson H. T. Tse, David B. Thomas, Wayne Luk |
| 2009 | FPGA | A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation. | David B. Thomas, Lee W. Howes, Wayne Luk |
| 2009 | FPL | Modeling post-techmapping and post-clustering FPGA circuit depth. | Joydip Das, Steven J. E. Wilton, Philip Heng Wai Leong, Wayne Luk |
| 2009 | FPL | Exploring reconfigurable architectures for explicit finite difference option pricing models. | Qiwei Jin, David B. Thomas, Wayne Luk |
| 2009 | FPL | Optimising designs by combining model-based and pattern-based transformations. | Qiang Liu, Tim Todman, Jos Gabriel de Figueiredo Coutinho, Wayne Luk, George A. Constantinides |
| 2009 | HOTI | FPGA Accelerated Low-Latency Market Data Feed Processing. | Gareth W. Morris, David B. Thomas, Wayne Luk |
| 2009 | SOFSEM | Design Validation by Symbolic Simulation and Equivalence Checking: A Case Study in Memory Optimization for Image Manipulation. | Kong Woei Susanto, Tim Todman, Jos Gabriel F. Coutinho, Wayne Luk |
| 2008 | DATE | Using Reconfigurable Logic to Optimise GPU Memory Accesses. | Ben Cope, Peter Y. K. Cheung, Wayne Luk |
| 2008 | FCCM | Power-Aware and Branch-Aware Word-Length Optimization. | William George Osborne, Jos Gabriel F. Coutinho, Wayne Luk, Oskar Mencer |
| 2008 | FCCM | Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation. | David B. Thomas, Wayne Luk |
| 2008 | FPGA | High-throughput interconnect wave-pipelining for global communication in FPGAs. | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk |
| 2008 | FPGA | FPGA-optimised high-quality uniform random number generators. | David B. Thomas, Wayne Luk |
| 2008 | FPL | Towards benchmarking energy efficiency of reconfigurable architectures. | Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa |
| 2008 | FPL | Rapid estimation of power consumption for hybrid FPGAs. | Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton |
| 2008 | FPL | A hardware compilation flow for instance-specific VLIW cores. | Markus Koester, Wayne Luk, Geoffrey Brown |
| 2008 | FPL | Mapping and scheduling with task clustering for heterogeneous computing systems. | Yuet Ming Lam, Jos Gabriel F. Coutinho, Wayne Luk, Philip Heng Wai Leong |
| 2008 | FPL | An analytical model describing the relationships between logic architecture and FPGA density. | Andrew Lam, Steven J. E. Wilton, Philip Heng Wai Leong, Wayne Luk |
| 2008 | FPL | Sampling from the exponential distribution using independent Bernoulli variates. | David B. Thomas, Wayne Luk |
| 2007 | DATE | Optimizing instruction-set extensible processors under data bandwidth constraints. | Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Wayne Luk, Can C. zturan, Gnhan Dndar |
| 2007 | FCCM | A Hybrid Memory Sub-system for Video Coding Applications. | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung |
| 2007 | FCCM | Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration. | Tobias Becker, Wayne Luk, Peter Y. K. Cheung |
| 2007 | FCCM | Optimizing Logarithmic Arithmetic on FPGAs. | Haohuan Fu, Oskar Mencer, Wayne Luk |
| 2007 | FCCM | Sampling from the Multivariate Gaussian Distribution using Reconfigurable Hardware. | David B. Thomas, Wayne Luk |
| 2007 | FPGA | A synthesizable datapath-oriented embedded FPGA fabric. | Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Bradley R. Quinton |
| 2007 | FPL | Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications. | Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton |
| 2007 | FPL | Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. | William George Osborne, Ray C. C. Cheung, Jos Gabriel F. Coutinho, Wayne Luk, Oskar Mencer |
| 2006 | CASES | Incremental elaboration for run-time reconfigurable hardware designs. | Arran Derbyshire, Tobias Becker, Wayne Luk |
| 2006 | DATE | Automating processor customisation: optimised memory access and resource sharing. | Robert G. Dimond, Oskar Mencer, Wayne Luk |
| 2006 | FCCM | Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA. | Robert G. Dimond, Oskar Mencer, Wayne Luk |
| 2006 | FCCM | Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs. | Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton, Sergio Lpez-Buedo |
| 2006 | FCCM | Generating Parametrised Hardware Libraries from Higher-Order Descriptions. | Oliver Pell, Wayne Luk |
| 2006 | FCCM | Efficient Hardware Generation of Random Variates with Arbitrary Distributions. | David B. Thomas, Wayne Luk |
| 2006 | FPL | Efficient Realtime FPGA Implementation of the Trace Transform. | Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y. K. Cheung, Wayne Luk |
| 2006 | FPL | Archlog: High-Level Synthesis of Reconfigurable Multiprocessors for Logic Programming. | Andreas Fidjeland, Wayne Luk |
| 2006 | FPL | On-FPGA Communication Architectures and Design Factors. | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk |
| 2006 | FPL | Compiling Higher-Order Polymorphic Hardware Descriptions Into Parametrised VHDL Libraries with Flexible Placement Information. | Oliver Pell, Wayne Luk |
| 2006 | FPL | Non-Uniform Random Number Generation Through Piecewise Linear Approximations. | David B. Thomas, Wayne Luk |
| 2005 | CASES | Automating custom-precision function evaluation for embedded processors. | Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung |
| 2005 | DAC | MiniBit: bit-width optimization via affine arithmetic. | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk |
| 2005 | DATE | Reconfigurable Elliptic Curve Cryptosystems on a Chip. | Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung |
| 2005 | DATE | Hardware Acceleration of Hidden Markov Model Decoding for Person Detection. | Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk |
| 2005 | FCCM | Reconfigurable Designs for Radiosity. | Paul Baker, Tim Todman, Henry Styles, Wayne Luk |
| 2005 | FCCM | Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation. | Jos Gabriel F. Coutinho, Jun Jiang, Wayne Luk |
| 2005 | FPL | CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools. | Robert G. Dimond, Oskar Mencer, Wayne Luk |
| 2005 | FPL | Novel FPGA-Based Implementation of Median and Weighted Median Filters for Image Processing. | Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk |
| 2005 | FPL | Compilation and Management of Phase-Optimized Reconfigurable Systems. | Henry Styles, Wayne Luk |
| 2005 | FPL | Bitwise Optimised CAM for Network Intrusion Detection Systems. | Sherif Yusuf, Wayne Luk |
| 2005 | FPL | Ziggurat-based Hardware Gaussian Random Number Generator. | Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk |
| 2004 | DATE | Customisable EPIC Processor: Architecture and Tools. | W. W. S. Chu, Robert G. Dimond, S. Perrott, S. P. Seng, Wayne Luk |
| 2004 | DATE | Evaluation of SystemC Modelling of Reconfigurable Embedded Systems. | Tero Rissa, Adam Donlin, Wayne Luk |
| 2004 | FCCM | Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs. | Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung |
| 2004 | FCCM | A Flexible Hardware Encoder for Low-Density Parity-Check Codes. | Dong-U Lee, Wayne Luk, Connie Wang, Christopher R. Jones, Michael Smith, John D. Villasenor |
| 2004 | FCCM | A Structured System Methodology for FPGA Based System-on-A-Chip Design. | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
| 2004 | FPL | Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. | Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk |
| 2004 | FPL | SoftSONIC: A Customisable Modular Platform for Video Applications. | Tero Rissa, Peter Y. K. Cheung, Wayne Luk |
| 2004 | FPL | A Structured Methodology for System-on-an-FPGA Design. | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
| 2004 | FPL | Implementing Graphics Shaders Using FPGAs. | David B. Thomas, Wayne Luk |
| 2004 | FPL | Methods and Tools for High-Resolution Imaging. | Tim Todman, Wayne Luk |
| 2004 | FPL | The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays. | Steven J. E. Wilton, Su-Shin Ang, Wayne Luk |
| 2004 | ISCAS | Autonomous Memory Block for reconfigurable computing. | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk |
| 2003 | FCCM | A Hardware Gaussian Noise Generator for Channel Code Evaluation. | Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung |
| 2003 | FCCM | Compiling Policy Descriptions into Reconfigurable Firewall Processors. | T. K. Lee, Sherif Yusuf, Wayne Luk, Morris Sloman, Emil Lupu, Naranker Dulay |
| 2003 | FCCM | Real-time Extensions to a C-like Hardware Description Language. | Tim Todman, Wayne Luk |
| 2003 | FPL | Hardware Design with a Scripting Language. | Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai |
| 2003 | FPL | FPGA-Based Computation of Free-Form Deformations. | Jun Jiang, Wayne Luk, Daniel Rueckert |
| 2003 | FPL | Non-uniform Segmentation for Hardware Function Evaluation. | Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung |
| 2003 | FPL | Irregular Reconfigurable CAM Structures for Firewall Applications. | T. K. Lee, Sherif Yusuf, Wayne Luk, Morris Sloman, Emil Lupu, Naranker Dulay |
| 2003 | FPL | A Reconfigurable Platform for Real-Time Embedded Video Image Processing. | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
| 2003 | FPL | Branch Optimisation Techniques for Hardware Compilation. | Henry Styles, Wayne Luk |
| 2003 | FPL | A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer. | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk |
| 2003 | FPL | Cluster-Driven Hardware/Software Partitioning and Scheduling Approach for a Reconfigurable Computer System. | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk |
| 2003 | ISCAS | Multitasking in hardware-software codesign for reconfigurable computer. | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FCCM | Optimum Wordlength Allocation. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FCCM | Customising Floating-Point Designs. | Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi |
| 2002 | FCCM | Reconfigurable Shape-Adaptive Template Matching Architectures. | Jrn Gause, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FCCM | Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform. | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FCCM | Accelerating Radiosity Calculations Using Reconfigurable Platforms. | Henry Styles, Wayne Luk |
| 2002 | FCCM | Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software Codesign. | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FMCAD | Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries. | Steve McKeever, Wayne Luk, Arran Derbyshire |
| 2002 | FPL | Automating Customisation of Floating-Point Designs. | Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi, James Hwang |
| 2002 | FPL | Image Registration of Real-Time Broadcast Video Using the UltraSONIC Reconfigurable Computer. | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk |
| 2002 | FPL | Run-Time Adaptive Flexible Instruction Processors. | Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung |
| 2001 | DATE | Heuristic datapath allocation for multiple wordlength systems. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2001 | FCCM | Pipelined Function Evaluation on FPGAs. | Nicolas Boullis, Oskar Mencer, Wayne Luk, Henry Styles |
| 2001 | FCCM | The Multiple Wordlength Paradigm. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2001 | FCCM | The Effect of FPGA Granularity on Video Codec Implementations. | Jrn Gause, Carsten Reuter, Holger Kropp, Peter Y. K. Cheung, Wayne Luk |
| 2001 | FCCM | Reconfigurable Designs for Ray Tracing. | Tim Todman, Wayne Luk |
| 2001 | FPL | Parameterized Function Evaluation for FPGAs. | Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles |
| 2001 | FPL | A Digit-Serial Structure for Reconfigurable Multipliers. | Chakkapas Visavakul, Peter Y. K. Cheung, Wayne Luk |
| 2001 | FPL | Task-Parallel Programming of Reconfigurable Systems. | Markus Weinhardt, Wayne Luk |
| 2001 | ICASSP | Parameterised floating-point arithmetic on FPGAs. | Allan Jaenicke, Wayne Luk |
| 2000 | CASES | Flexible instruction processors. | Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung |
| 2000 | FCCM | Multiple Precision for Resource Minimization. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2000 | FCCM | Combining Serialization and Reconfiguration for Convolver Designs. | Arran Derbyshire, Wayne Luk |
| 2000 | FCCM | Customizing Graphics Applications: Techniques and Programming Interface. | Henry Styles, Wayne Luk |
| 2000 | FCCM | Evaluating Hardware Compilation Techniques. | Markus Weinhardt, Wayne Luk |
| 2000 | FPL | Multiple-Wordlength Resource Binding. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2000 | FPL | Combining Serialisation and Reconfiguration for FPGA Designs. | Arran Derbyshire, Wayne Luk |
| 2000 | FPL | Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT. | Jrn Gause, Peter Y. K. Cheung, Wayne Luk |
| 2000 | FPL | A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems. | Xue-Jie Zhang, Kam-Wing Ng, Wayne Luk |
| 2000 | ISCAS | Roundoff-noise shaping in filter design. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 1999 | FCCM | Optimizing FPGA-Based Vector Product Designs. | Dan Benyamin, John D. Villasenor, Wayne Luk |
| 1999 | FCCM | SONIC - A Plug-In Architecture for Video Processing. | Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone |
| 1999 | FCCM | Reconfigurable Computing for Augmented Reality. | Wayne Luk, T. K. Lee, J. Rice, Nabeel Shirazi, Peter Y. K. Cheung |
| 1999 | FCCM | Pipeline Vectorization for Reconfigurable Systems. | Markus Weinhardt, Wayne Luk |
| 1999 | FPGA | Towards Adaptable Hierarchical Placement for FPGAs. | Florent de Dinechin, Wayne Luk, Steve McKeever |
| 1999 | FPL | Untitled record | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 1999 | FPL | SONIC - A Plug-In Architecture for Video Processing. | Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone |
| 1999 | FPL | Serial Hardware Libraries for Reconfigurable Designs. | Wayne Luk, Arran Derbyshire, Shaori Guo, D. Siganos |
| 1999 | FPL | Quantitative Analysis of Run-Time Reconfigurable Database Search. | Nabeel Shirazi, Wayne Luk, Dan Benyamin, Peter Y. K. Cheung |
| 1999 | FPL | Memory Access Optimization and RAM Inference for Pipeline Vectorization. | Markus Weinhardt, Wayne Luk |
| 1998 | FCCM | Automating Production of Run-Time Reconfigurable Designs. | Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung |
| 1998 | FPL | A Reconfigurable Engine for Real-Time Video Processing. | Wayne Luk, P. Andreou, Arran Derbyshire, Florent Dupont de Dinechin, J. Rice, Nabeel Shirazi, D. Siganos |
| 1998 | FPL | Pebble: A Language for Parametrised and Reconfigurable Hardware Design. | Wayne Luk, Steve McKeever |
| 1998 | FPL | Run-Time Management of Dynamically Recongigurable Designs. | Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung |
| 1997 | FCCM | Compilation tools for run-time reconfigurable designs. | Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung |
| 1997 | FPL | A reconfigurable data-localised array for morphological algorithms. | Anjit Sekhar Chaudhuri, Peter Y. K. Cheung, Wayne Luk |
| 1997 | FPL | Pipeline morphing and virtual pipelines. | Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung |
| 1997 | FPL | Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research. | Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Luk, Richard Sandiford |
| 1996 | FCCM | Modelling and optimising run-time reconfigurable systems. | Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung |
| 1996 | FPL | A Framework for Developing Parameterised FPGA Libraries. | Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang |
| 1995 | FCCM | A declarative approach to incremental custom computing. | Wayne Luk |
| 1995 | FPL | Compiling Ruby into FPGAs. | Shaori Guo, Wayne Luk |
| 1995 | FPL | Using Reconfigurable Hardware to Speed up Product Development and Performance. | Adrian Lawrence, Andrew Kay, Wayne Luk, Toshio Nomura, Ian Page |
| 1994 | FPL | Constraint-based Hierarchical Placement of Parallel Programs. | Mat Newman, Wayne Luk, Ian Page |
| 1994 | ICRA | Developing Parallel Architectures for Range and Image Sensors. | Shaori Guo, Wayne Luk, Penelope Probert |