| 2015 | CGO | HERMES: a fast cross-ISA binary translator with post-optimization. | Xiaochun Zhang, Qi Guo, Yunji Chen, Tianshi Chen, Weiwu Hu |
| 2012 | HPCA | Statistical performance comparisons of computers. | Tianshi Chen, Yunji Chen, Qi Guo, Olivier Temam, Yue Wu, Weiwu Hu |
| 2011 | DATE | Empirical design bugs prediction for verification. | Qi Guo, Tianshi Chen, Haihua Shen, Yunji Chen, Yue Wu, Weiwu Hu |
| 2011 | IJCAI | Effective and Efficient Microprocessor Design Space Exploration Using Unlabeled Design Configurations. | Qi Guo, Tianshi Chen, Yunji Chen, Zhi-Hua Zhou, Weiwu Hu, Zhiwei Xu |
| 2011 | SPAA | Brief announcement: program regularization in verifying memory consistency. | Lei Li, Tianshi Chen, Yunji Chen, Ling Li, Cheng Qian, Weiwu Hu |
| 2010 | FPGA | A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only). | Huandong Wang, Xiang Gao, Yunji Chen, Dan Tang, Weiwu Hu |
| 2010 | HPCA | DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance. | Dan Tang, Yungang Bao, Weiwu Hu, Mingyu Chen |
| 2010 | ISCA | LReplay: a pending period based deterministic replay scheme. | Yunji Chen, Weiwu Hu, Tianshi Chen, Ruiyang Wu |
| 2010 | VLSID | Design of Low-Cost High-Performance Floating-Point Fused Multiply-Add with Reduced Power. | Zichu Qi, Qi Guo, Ge Zhang, Xiangku Li, Weiwu Hu |
| 2009 | HPCA | Fast complete memory consistency verification. | Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen, Haihua Shen, Pengyu Wang, Hong Pan |
| 2009 | ICCD | Efficient binary translation system with low hardware cost. | Weiwu Hu, Qi Liu, Jian Wang, Songsong Cai, Menghao Su, Xiaoyu Li |
| 2009 | ISCAS | Measuring and Compensating for Process Mismatch-induced, Reference Spurs in Phase-locked Loops using a Sub-sampled DSP. | Zhuo Gao, D. Kesharwani, Patrick Chiang, Weiwu Hu |
| 2008 | ISCAS | A synchronized variable frequency clock scheme in chip multiprocessors. | Qifei Fan, Ge Zhang, Weiwu Hu |
| 2008 | PRDC | Fetching Primary and Redundant Instructions in Turn for a Fault-Tolerant Embedded Microprocessor. | Shijian Zhang, Weiwu Hu |
| 2007 | ISCAS | An Efficient Error Control Scheme for Chip-to-Chip Optical Interconnects. | Jun Wang, Ge Zhang, Weiwu Hu |
| 2006 | EuroPar | A Hybrid Hardware/Software Generated Prefetching Thread Mechanism on Chip Multiprocessors. | Hou Rui, Longbing Zhang, Weiwu Hu |
| 2006 | ICCD | Microarchitecture and Performance Analysis of Godson-2 SMT Processor. | Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang |
| 2005 | ISCAS | A novel design of leading zero anticipation circuit with parallel error detection. | Ge Zhang, Zichu Qi, Weiwu Hu |
| 2004 | CLUSTER | A shared virtual memory network with fast remote direct memory access and message passing. | Gang Shi, Mingchang Hu, Hongda Yin, Weiwu Hu, Zhimin Tang |
| 2001 | CLUSTER | Communication with Threads in Software DSM. | Weiwu Hu, Gang Shi, Fuxin Zhang |
| 2000 | EuroPar | A New Home-Based Software DSM Protocol for SMP Clusters. | Weiwu Hu, Fuxin Zhang, Haiming Liu |
| 1999 | EuroPar | Write Detection in Home-Based Software DSMs. | Weiwu Hu, Weisong Shi, Zhimin Tang |
| 1999 | HPDC | Adaptive Write Detection in Home-based Software DSMs. | Weiwu Hu, Weisong Shi, Zhimin Tang |
| 1999 | HPDC | Dynamic Task Migration in Home-based Software DSM Systems. | Weisong Shi, Weiwu Hu, Zhimin Tang, M. Rasit Eskicioglu |
| 1994 | ICPADS | A Graph Model for Investigating Memory Consistency. | Weiwu Hu |