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Wenjing Rao

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

25

Venues

11

Active years

2003–2026

Best venue rank

A*

Where they publish

Papers

25 indexed papers, newest first.

YearVenueTitleAuthors
2026ETSBeyond Fingerprints: Systematic Design of APUFs for Batch Identification.Lina Baolati, Wenjing Rao, Natasha Devroye
2025VTSChallenge Selection for Salvaging Faulty APUFs.Yeqi Wei, Wenjing Rao, Natasha Devroye
2023DATEAPUF Production Line Faults: Uniqueness and Testing.Yeqi Wei, Wenjing Rao, Natasha Devroye
2023DSDActive learning for fast and slow modeling attacks on Arbiter PUFs.Vincent Dumoulin, Wenjing Rao, Natasha Devroye
2022DATEAPUF Faults: Impact, Testing, and Diagnosis.Yeqi Wei, Tim Fox, Vincent Dumoulin, Wenjing Rao, Natasha Devroye
2017ASPDACA local reconfiguration based scalable fault tolerant many-processor array.Soumya Banerjee, Wenjing Rao
2017COCOONThe Existence of Universally Agreed Fairest Semi-matchings in Any Given Bipartite Graph.Jian Xu, Soumya Banerjee, Wenjing Rao
2016DATEA general approach for highly defect tolerant Parallel Prefix Adder design.Soumya Banerjee, Wenjing Rao
2015ASPDACIC Piracy prevention via Design Withholding and Entanglement.Soroush Khaleghi, Kai Da Zhao, Wenjing Rao
2015ICCDOn the conditions of guaranteed k-fault tolerant systems supporting on-the-fly repairs.Soumya Banerjee, Wenjing Rao
2013DATEDefect-tolerant logic hardening for crossbar-based nanosystems.Yehua Su, Wenjing Rao
2011ICCADDefect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously.Yehua Su, Wenjing Rao
2010ICCDOn mismatch number distribution of nanocrossbar logic mapping.Yehua Su, Wenjing Rao
2008DATETowards fault tolerant parallel prefix adders in nanoelectronic systems.Wenjing Rao, Alex Orailoglu
2007DATEInteractive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2007DSNFault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2006DACTopology aware mapping of logic functions onto nanowire-based crossbar architectures.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2006ETSFault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2006VTSNanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2005ASPDACFault tolerant nanoelectronic processor architectures.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2005ICCDArchitectural-Level Fault Tolerant Computation in Nanoelectronic Processors.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2004ICCADFrugal linear network-based test decompression for drastic test cost reductions.Wenjing Rao, Alex Orailoglu, George Su
2004ITCFault Tolerant Arithmetic with Applications in Nanotechnology based Systems.Wenjing Rao, Alex Orailoglu, Ramesh Karri
2003DACTest application time and volume compression through seed overlapping.Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
2003DATEVirtual Compression through Test Vector Stitching for Scan Based Designs.Wenjing Rao, Alex Orailoglu