| 2026 | ASPLOS | AGS: Accelerating 3D Gaussian Splatting SLAM via CODEC-Assisted Frame Covisibility Detection. | Houshu He, Naifeng Jing, Li Jiang, Xiaoyao Liang, Zhuoran Song |
| 2026 | ISCA | AQuant: Repurposing CODEC for VLM Acceleration via Adaptive Quantization. | Zhuoran Song, Chunyu Qi, Jian Weng, Xiaoyao Liang, Haibing Guan |
| 2025 | DAC | SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity. | Ruiyang Chen, Xueyuan Liu, Chunyu Qi, Yuanzheng Yao, Yanan Sun, Xiaoyao Liang, Zhuoran Song |
| 2025 | DAC | MHDiff: Memory- and Hardware-Efficient Diffusion Acceleration via Focal Pixel Aware Quantization. | Chunyu Qi, Xuhang Wang, Ruiyang Chen, Yuanzheng Yao, Naifeng Jing, Chen Zhang, Jun Wang, Zhihui Fu, Xiaoyao Liang, Zhuoran Song |
| 2025 | DAC | SynGPU: Synergizing CUDA and Bit-Serial Tensor Cores for Vision Transformer Acceleration on GPU. | Yuanzheng Yao, Chen Zhang, Chunyu Qi, Ruiyang Chen, Jun Wang, Zhihui Fu, Naifeng Jing, Xiaoyao Liang, Zhuoran Song |
| 2025 | DATE | BMP-SD: Marrying Binary and Mixed-Precision Quantization for Efficient Stable Diffusion Inference. | Cheng Gu, Gang Li, Xiaolong Lin, Jiayao Ling, Jian Cheng, Xiaoyao Liang |
| 2025 | DATE | SBQ: Exploiting Significant Bits for Efficient and Accurate Post-Training DNN Quantization. | Jiayao Ling, Gang Li, Qinghao Hu, Xiaolong Lin, Cheng Gu, Jian Cheng, Xiaoyao Liang |
| 2025 | EuroPar | Light-DiT: An Importance-Aware Dynamic Compression Framework for Diffusion Transformers. | Cheng Gu, Gang Li, Xuan Zhang, Jiayao Ling, Xiaolong Lin, Zhuoran Song, Jian Cheng, Xiaoyao Liang |
| 2025 | HPCA | GSArch: Breaking Memory Barriers in 3D Gaussian Splatting Training via Architectural Support. | Houshu He, Gang Li, Fangxin Liu, Li Jiang, Xiaoyao Liang, Zhuoran Song |
| 2025 | MICRO | HEAT: NPU-NDP HEterogeneous Architecture for Transformer-Empowered Graph Neural Networks. | Ruiyang Chen, Zhuoran Song, Yicheng Zheng, Zeyu Zhu, Gang Li, Naifeng Jing, Xiaoyao Liang, Haibing Guan |
| 2025 | MICRO | GCC: A 3DGS Inference Architecture with Gaussian-Wise and Cross-Stage Conditional Processing. | Minnan Pei, Gang Li, Junwen Si, Zeyu Zhu, Zitao Mo, Peisong Wang, Zhuoran Song, Xiaoyao Liang, Jian Cheng |
| 2024 | ASPLOS | CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing. | Zhuoran Song, Chunyu Qi, Fangxin Liu, Naifeng Jing, Xiaoyao Liang |
| 2024 | ASPLOS | FastGL: A GPU-Efficient Framework for Accelerating Sampling-Based GNN Training at Large Scale. | Zeyu Zhu, Peisong Wang, Qinghao Hu, Gang Li, Xiaoyao Liang, Jian Cheng |
| 2024 | DAC | MoC: A Morton-Code-Based Fine-Grained Quantization for Accelerating Point Cloud Neural Networks. | Xueyuan Liu, Zhuoran Song, Hao Chen, Xing Li, Xiaoyao Liang |
| 2024 | DAC | TSAcc: An Efficient \underline{T}empo-\underline{S}patial Similarity Aware \underline{Acc}elerator for Attention Acceleration. | Zhuoran Song, Chunyu Qi, Yuanzheng Yao, Peng Zhou, Yanyi Zi, Nan Wang, Xiaoyao Liang |
| 2024 | DAC | InterArch: Video Transformer Acceleration via Inter-Feature Deduplication with Cube-based Dataflow. | Xuhang Wang, Zhuoran Song, Xiaoyao Liang |
| 2024 | DATE | FusionArch: A Fusion-Based Accelerator for Point-Based Point Cloud Neural Networks. | Xueyuan Liu, Zhuoran Song, Guohao Dai, Gang Li, Can Xiao, Yan Xiang, Dehui Kong, Ke Xu, Xiaoyao Liang |
| 2024 | DATE | Sava: A Spatial- and Value-Aware Accelerator for Point Cloud Transformer. | Xueyuan Liu, Zhuoran Song, Xiang Liao, Xing Li, Tao Yang, Fangxin Liu, Xiaoyao Liang |
| 2024 | EuroPar | Watt: A Write-Optimized RRAM-Based Accelerator for Attention. | Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Naifeng Jing, Li Jiang, Xiaoyao Liang |
| 2024 | HPCA | MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization. | Zeyu Zhu, Fanrong Li, Gang Li, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng |
| 2024 | ICCD | Early: An Importance-Aware Early Firing and Exit for SNN Acceleration. | Xuan Zhang, Zhuoran Song, Peng Zhou, Xing Li, Xueyuan Liu, Xiaolong Lin, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang |
| 2024 | ISCA | UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space. | Yilong Zhao, Mingyu Gao, Fangxin Liu, Yiwei Hu, Zongwu Wang, Han Lin, Jin Li, He Xian, Hanlin Dong, Tao Yang, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2024 | ISCAS | GNeRF: Accelerating Neural Radiance Fields Inference via Adaptive Sample Gating. | Cheng Gu, Gang Li, Xiaolong Lin, Jiayao Ling, Xiaoyao Liang |
| 2024 | MICRO | SRender: Boosting Neural Radiance Field Efficiency via Sensitivity-Aware Dynamic Precision Rendering. | Zhuoran Song, Houshu He, Fangxin Liu, Yifan Hao, Xinkai Song, Li Jiang, Xiaoyao Liang |
| 2023 | DAC | AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity. | Xiaolong Lin, Gang Li, Zizhao Liu, Yadong Liu, Fan Zhang, Zhuoran Song, Naifeng Jing, Xiaoyao Liang |
| 2023 | DATE | PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. | Zhuoran Song, Heng Lu, Gang Li, Li Jiang, Naifeng Jing, Xiaoyao Liang |
| 2023 | ICCD | ViTframe: Vision Transformer Acceleration via Informative Frame Selection for Video Recognition. | Chunyu Qi, Zilong Li, Zhuoran Song, Xiaoyao Liang |
| 2023 | ICCD | DEQ: Dynamic Element-wise Quantization for Efficient Attention Architecture. | Xuhang Wang, Zhuoran Song, Qiyue Huang, Xiaoyao Liang |
| 2023 | ICCD | RealArch: A Real-Time Scheduler for Mapping Multi-Tenant DNNs on Multi-Core Accelerators. | Xuhang Wang, Zhuoran Song, Xiaoyao Liang |
| 2023 | ICCD | HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model. | Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang |
| 2023 | ICLR | $\rm A^2Q$: Aggregation-Aware Quantization for Graph Neural Networks. | Zeyu Zhu, Fanrong Li, Zitao Mo, Qinghao Hu, Gang Li, Zejian Liu, Xiaoyao Liang, Jian Cheng |
| 2022 | DAC | EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks. | Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2022 | DAC | E | Zhuoran Song, Zhongkai Yu, Naifeng Jing, Xiaoyao Liang |
| 2022 | FPGA | N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores. | Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang, Xiaobing Tu, Xiaoyao Liang, Li Jiang |
| 2022 | ICCAD | Gzippo: Highly-Compact Processing-in-Memory Graph Accelerator Alleviating Sparsity and Redundancy. | Xing Li, Rachata Ausavarungnirun, Xiao Liu, Xueyuan Liu, Xuan Zhang, Heng Lu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang |
| 2022 | ICCD | GCNTrain: A Unified and Efficient Accelerator for Graph Convolutional Neural Network Training. | Heng Lu, Zhuoran Song, Xing Li, Naifeng Jing, Xiaoyao Liang |
| 2022 | MICRO | Ristretto: An Atomized Processing Architecture for Sparsity-Condensed Stream Flow in CNN. | Gang Li, Weixiang Xu, Zhuoran Song, Naifeng Jing, Jian Cheng, Xiaoyao Liang |
| 2021 | DAC | PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. | Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He, Li Jiang |
| 2021 | DAC | BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture. | Nanyang Ye, Jingbiao Mei, Zhicheng Fang, Yuwen Zhang, Ziqing Zhang, Huaying Wu, Xiaoyao Liang |
| 2021 | ICCD | SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. | Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Tao Yang, Jingnai Feng, Xiaoyao Liang, Li Jiang |
| 2021 | ICCV | Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point. | Fangxin Liu, Wenbo Zhao, Zhezhi He, Yanzhi Wang, Zongwu Wang, Changzhi Dai, Xiaoyao Liang, Li Jiang |
| 2021 | ISCAS | ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator. | Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang |
| 2021 | ISPA | PIPArch: Programmable Image Processing Architecture Using Sliding Array. | Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing, Xiaoyao Liang |
| 2021 | MICCAI | Contrastive Learning Based Stain Normalization Across Multiple Tumor in Histopathology. | Jing Ke, Yiqing Shen, Xiaoyao Liang, Dinggang Shen |
| 2020 | AIME | A High-Throughput Tumor Location System with Deep Learning for Colorectal Cancer Histopathology Image. | Jing Ke, Yiqing Shen, Yi Guo, Jason D. Wright, Naifeng Jing, Xiaoyao Liang |
| 2020 | DAC | PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture. | Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han, Li Jiang |
| 2020 | DAC | GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores. | Zhuoran Song, Jianfei Wang, Tianjian Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing |
| 2020 | HPCC | PRArch: Pattern-Based Reconfigurable Architecture for Deep Neural Network Acceleration. | Zhaoming Jiang, Zhuoran Song, Xiaoyao Liang, Naifeng Jing |
| 2020 | ICIP | Fast Tumor Detector in Whole-Slide Image With Dynamic Programing Based Monte Carlo Sampling. | Jing Ke, Yiqing Shen, Yi Guo, Xiaoyao Liang |
| 2020 | ISCA | DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration. | Zhuoran Song, Bangqi Fu, Feiyang Wu, Zhaoming Jiang, Li Jiang, Naifeng Jing, Xiaoyao Liang |
| 2020 | MICRO | VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration. | Zhuoran Song, Feiyang Wu, Xueyuan Liu, Jing Ke, Naifeng Jing, Xiaoyao Liang |
| 2019 | ASPDAC | HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. | Houxiang Ji, Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang |
| 2019 | ASPDAC | A sharing-aware L1.5D cache for data reuse in GPGPUs. | Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing |
| 2019 | DAC | System-level hardware failure prediction using deep learning. | Xiaoyi Sun, Krishnendu Chakrabarty, Ruirui Huang, Yiquan Chen, Bing Zhao, Hai Cao, Yinhe Han, Xiaoyao Liang, Li Jiang |
| 2019 | DATE | Approximate Random Dropout for DNN training acceleration in GPGPU. | Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru Huang, Hai Zhao, Xiaoyao Liang, Li Jiang |
| 2018 | DATE | In-growth test for monolithic 3D integrated SRAM. | Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, Li Jiang |
| 2018 | FPGA | A FPGA Friendly Approximate Computing Framework with Hybrid Neural Networks: (Abstract Only). | Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2018 | ICCAD | AXNet: approximate computing using an end-to-end trainable neural network. | Zhenghao Peng, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang, Cewu Lu, Li Jiang |
| 2018 | ICCAD | Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. | Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2017 | DAC | Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique. | Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2017 | DAC | On Quality Trade-off Control for Approximate Computing Using Iterative Training. | Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2017 | DATE | Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar. | Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, Li Jiang |
| 2017 | DATE | Fault clustering technique for 3D memory BISR. | Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S. Lee, Li Jiang |
| 2016 | ICCD | CNFET-based high throughput register file architecture. | Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang |
| 2016 | ISCA | Power Attack Defense: Securing Battery-Backed Data Centers. | Chao Li, Zhenhua Wang, Xiaofeng Hou, Haopeng Chen, Xiaoyao Liang, Minyi Guo |
| 2016 | ISPDC | Applying Victim Cache in High Performance GPGPU Computing. | Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang, Naifeng Jing |
| 2016 | ITC | Defect tolerance for CNFET-based SRAMs. | Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty |
| 2016 | MICRO | Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. | Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang |
| 2015 | DAC | Jump test for metallic CNTs in CNFET-based SRAM. | Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang |
| 2015 | ICCD | A novel TSV probing technique with adhesive test interposer. | Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, Huiyun Li |
| 2015 | ICPP | Exploring Hardware Profile-Guided Green Datacenter Scheduling. | Weichao Tang, Yu Wang, Haopeng Liu, Tao Zhang, Chao Li, Xiaoyao Liang |
| 2015 | ISCA | Towards sustainable in-situ server systems in the big data era. | Chao Li, Yang Hu, Longjun Liu, Juncheng Gu, Mingcong Song, Xiaoyao Liang, Jingling Yuan, Tao Li |
| 2015 | ICS | Building Fuel Powered Supercomputing Data Center at Low Cost. | Yiqing Hua, Chao Li, Weichao Tang, Li Jiang, Xiaoyao Liang |
| 2015 | ISLPED | Bank stealing for conflict mitigation in GPGPU Register File. | Naifeng Jing, Shuang Chen, Shunning Jiang, Li Jiang, Chao Li, Xiaoyao Liang |
| 2015 | ISLPED | CGSharing: Efficient content sharing in GPU-based cloud gaming. | Xiangyu Wu, Yuanfang Xia, Naifeng Jing, Xiaoyao Liang |
| 2015 | ITC | On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. | Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu |
| 2014 | ICCD | Dynamic front-end sharing in graphics processing units. | Tao Zhang, Xiaoyao Liang |
| 2014 | ICPADS | HFA: A Hint Frequency-based approach to enhance the I/O performance of multi-level cache storage systems. | Xiaodong Meng, Chentao Wu, Jie Li, Xiaoyao Liang, Bin Yao, Minyi Guo, Long Zheng |
| 2013 | ISCA | An energy-efficient and scalable eDRAM-based register file architecture for GPGPU. | Naifeng Jing, Yao Shen, Yao Lu, Shrikanth Ganapathy, Zhigang Mao, Minyi Guo, Ramon Canal, Xiaoyao Liang |
| 2013 | ISLPED | Compiler assisted dynamic register file in GPGPU. | Naifeng Jing, Haopeng Liu, Yao Lu, Xiaoyao Liang |
| 2012 | HPCA | AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture. | Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang |
| 2010 | ISCA | Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. | Guihai Yan, Xiaoyao Liang, Yinhe Han, Xiaowei Li |
| 2009 | ICCD | Design and test strategies for microarchitectural post-fabrication tuning. | Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David M. Brooks |
| 2009 | ICCD | Empirical performance models for 3T1D memories. | Kristen Lovin, Benjamin C. Lee, Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei |
| 2009 | ISLPED | MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. | Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li |
| 2008 | ISCA | ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. | Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks |
| 2008 | ISLPED | Instruction-driven clock scheduling with glitch mitigation. | Gu-Yeon Wei, David M. Brooks, Ali Durlov Khan, Xiaoyao Liang |
| 2007 | ICCAD | Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. | Xiaoyao Liang, Kerem Turgay, David M. Brooks |
| 2007 | MICRO | Process Variation Tolerant 3T1D-Based Cache Architectures. | Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks |
| 2006 | ICCAD | Microarchitecture parameter selection to optimize system performance under process variation. | Xiaoyao Liang, David M. Brooks |
| 2006 | MICRO | Mitigating the Impact of Process Variations on Processor Register Files and Execution Units. | Xiaoyao Liang, David M. Brooks |
| 2005 | ISCAS | Equalizing data-path for processing speed determination in block level pipelining. | Xiaoyao Liang, Akshay Athalye, Sangjin Hong |
| 2005 | ISCAS | Dynamic coarse grain dataflow reconfiguration technique for real-time systems design. | Xiaoyao Liang, Akshay Athalye, Sangjin Hong |