| 2026 | ASPDAC | Integrated Re-Fragmentation and Curve Correction for Curvilinear Optical Proximity Correction. | Seohyun Kim, Shilong Zhang, Junha Jang, Youngsoo Shin |
| 2026 | CHI | Empowering Users Through Conversational Explanations: Interplay of Choice Architecture and Linguistic Styles in Music Recommenders. | Youngsoo Shin, Krithik Ranjan |
| 2026 | CHI | Augmenting Human Motivation: A Co-Creative Inquiry into AR Glass Interactions for Everyday Thriving. | Youngsoo Shin, Jonathan W. Williams, Bumho Lee |
| 2025 | ASPDAC | An Island Style Multi-Objective Evolutionary Framework for Synthesis of Memristor-Aided Logic. | Umar Afzaal, Seunggyu Lee, Youngsoo Shin |
| 2025 | ASPDAC | ML for Computational Lithography: Practical Recipes. | Youngsoo Shin |
| 2025 | ISCAS | Fast and Accurate Analysis of Power Distribution Network Impedance for DRAM Design. | Minseung Shin, Shilong Zhang, Youngsoo Shin |
| 2024 | DATE | Fast IR-Drop Prediction of Analog Circuits Using Recurrent Synchronized GCN and Y-Net Model. | Seunggyu Lee, Daijoon Hyun, Younggwang Jung, Gangmin Cho, Youngsoo Shin |
| 2023 | ASPDAC | Decoupling Capacitor Insertion Minimizing IR-Drop Violations and Routing DRVs. | Daijoon Hyun, Younggwang Jung, Insu Cho, Youngsoo Shin |
| 2023 | DAC | Lightning Talk 21: EDA with ML, Rule-Based, or Both? | Youngsoo Shin |
| 2023 | ICCAD | Power Distribution Network Optimization Using HLA-GCN for Routability Enhancement. | Younggwang Jung, Daijoon Hyun, Soyoon Choi, Youngsoo Shin |
| 2023 | ISCAS | Multisource Clock Tree Synthesis Through Sink Clustering and Fast Clock Latency Prediction. | Byungho Choi, Yonghwi Kwon, Umar Afzaal, Youngsoo Shin |
| 2023 | ISCAS | Block-Level Power Net Routing of Analog Circuit Using Reinforcement Learning. | Taeyoung Kim, Gangmin Cho, Youngsoo Shin |
| 2023 | OZCHI | Too Many or Too Little: Investigating Different Decision-making Experiences of Maximizers and Satisficers in HCIs. | Youngsoo Shin, Jungkyoon Yoon |
| 2021 | CHI | PENCODER: Design for Prospective Memory and Older Adults. | Youngsoo Shin, Ruth Barankevich, Jina Lee, Saleh Kalantari |
| 2021 | ISCAS | Routability Optimization for Extreme Aspect Ratio Design Using Convolutional Neural Network. | Sunwha Koh, Younggwang Jung, Daijoon Hyun, Youngsoo Shin |
| 2021 | ISCAS | Dynamic IR Drop Prediction Using Image-to-Image Translation Neural Network. | Yonghwi Kwon, Giyoon Jung, Daijoon Hyun, Youngsoo Shin |
| 2020 | ASPDAC | Integrated Airgap Insertion and Layer Reassignment for Circuit Timing optimization. | Younggwang Jung, Daijoon Hyun, Youngsoo Shin |
| 2020 | ISLPED | Pre-layout clock tree estimation and optimization using artificial neural network. | Sunwha Koh, Yonghwi Kwon, Youngsoo Shin |
| 2019 | DATE | Accurate Wirelength Prediction for Placement-Aware Synthesis through Machine Learning. | Daijoon Hyun, Yuepeng Fan, Youngsoo Shin |
| 2019 | ICCAD | Clock Gating Synthesis of Netlist with Cyclic Logic Paths. | Yonghwi Kwon, Inhak Han, Youngsoo Shin |
| 2019 | ICCAD | Endurance Enhancement of Multi-Level Cell Phase Change Memory. | Cheongwon Lee, Youngsoo Song, Youngsoo Shin |
| 2019 | ISCAS | Standard Cell Layout Design and Placement Optimization for TFET-Based Circuits. | Youngsoo Song, Jinwook Jung, Youngsoo Shin |
| 2018 | ASPDAC | Automatic insertion of airgap with design rule constraints. | Daijoon Hyun, Youngsoo Shin |
| 2018 | ISCAS | Library Optimization for Near-Threshold Voltage Design. | Daijoon Hyun, Jaewoo Seo, Youngsoo Shin |
| 2018 | ISCAS | Transient Clock Power Estimation of Pre-CTS Netlist. | Yonghwi Kwon, Jinwook Jung, Inhak Han, Youngsoo Shin |
| 2018 | ISCAS | Fast Timing Analysis of Transistor-Level Full Custom Digital Circuits. | Jingon Lee, Jinwook Jung, Youngsoo Shin |
| 2017 | DAC | Pin Accessibility-Driven Cell Layout Redesign and Placement Optimization. | Jaewoo Seo, Jinwook Jung, Sangmin Kim, Youngsoo Shin |
| 2017 | DATE | Cut mask optimization for multi-patterning directed self-assembly lithography. | Wachirawit Ponghiran, Seongbo Shim, Youngsoo Shin |
| 2017 | DATE | Timing-aware wire width optimization for SADP process. | Youngsoo Song, Sangmin Kim, Youngsoo Shin |
| 2016 | ASPDAC | Buffer insertion to remove hold violations at multiple process corners. | Inhak Han, Daijoon Hyun, Youngsoo Shin |
| 2016 | ASPDAC | Mask optimization for directed self-assembly lithography: Inverse DSA and inverse lithography. | Seongbo Shim, Youngsoo Shin |
| 2016 | DAC | Redundant via insertion for multiple-patterning directed-self-assembly lithography. | Seongbo Shim, Woohyun Chung, Youngsoo Shin |
| 2016 | DATE | Redundant via insertion in directed self-assembly lithography. | Woohyun Chung, Seongbo Shim, Youngsoo Shin |
| 2016 | ICCAD | OWARU: free space-aware timing-driven incremental placement. | Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin |
| 2016 | ISCAS | Crosslink insertion for minimizing OCV clock skew. | Kiwon Yoon, Seongbo Shim, Youngsoo Shin |
| 2015 | DATE | Identifying redundant inter-cell margins and its application to reducing routing congestion. | Woohyun Chung, Seongbo Shim, Youngsoo Shin |
| 2015 | ICCAD | Defect Probability of Directed Self-Assembly Lithography: Fast Identification and Post-Placement Optimization. | Seongbo Shim, Woohyun Chung, Youngsoo Shin |
| 2015 | ICCD | Physical synthesis of DNA circuits with spatially localized gates. | Jinwook Jung, Daijoon Hyun, Youngsoo Shin |
| 2014 | ASPDAC | Lithographic defect aware placement using compact standard Cells without inter-cell margin. | Seongbo Shim, Yoojong Lee, Youngsoo Shin |
| 2014 | ASPDAC | Power minimization of pipeline architecture through 1-cycle error correction and voltage scaling. | Insup Shin, Jae-Joon Kim, Youngsoo Shin |
| 2013 | ASPDAC | Pulsed-latch ASIC synthesis in industrial design flow. | Sangmin Kim, Duckhwan Kim, Youngsoo Shin |
| 2013 | ICCD | Analysis and minimization of short-circuit current in mesh clock network. | Seongbo Shim, Minyoung Mo, Sangmin Kim, Youngsoo Shin |
| 2013 | ISLPED | A pipeline architecture with 1-cycle timing error correction for low voltage operations. | Insup Shin, Jae-Joon Kim, Yu-Shiang Lin, Youngsoo Shin |
| 2011 | ASPDAC | Selectively patterned masks: Structured ASIC with asymptotically ASIC performance. | Donkyu Baek, Insup Shin, Seungwhun Paik, Youngsoo Shin |
| 2011 | ASPDAC | Pulser gating: A clock gating of pulsed-latch circuits. | Sangmin Kim, Inhak Han, Seungwhun Paik, Youngsoo Shin |
| 2011 | DAC | Thermal signature: a simple yet accurate thermal index for floorplan optimization. | Jaeha Kung, Inhak Han, Sachin S. Sapatnekar, Youngsoo Shin |
| 2011 | ICCAD | Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. | Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin |
| 2010 | ASPDAC | Statistical time borrowing for pulsed-latch circuit designs. | Seungwhun Paik, Lee-eun Yu, Youngsoo Shin |
| 2010 | ASPDAC | Bounded potential slack: enabling time budgeting for dual-Vt allocation of hierarchical design. | Jun Seomun, Seungwhun Paik, Youngsoo Shin |
| 2010 | DAC | Pulsed-latch aware placement for timing-integrity optimization. | Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang |
| 2010 | DAC | Synthesis and implementation of active mode power gating circuits. | Jun Seomun, Insup Shin, Youngsoo Shin |
| 2010 | ISLPED | Wakeup synthesis and its buffered tree construction for power gating circuit designs. | Seungwhun Paik, Sangmin Kim, Youngsoo Shin |
| 2009 | DAC | Register allocation for high-level synthesis using dual supply voltages. | Insup Shin, Seungwhun Paik, Youngsoo Shin |
| 2009 | DATE | HLS-l: High-level synthesis of high performance latch-based circuits. | Seungwhun Paik, Insup Shin, Youngsoo Shin |
| 2009 | ICCAD | Retiming and time borrowing: Optimizing high-performance pulsed-latch-based circuits. | Seonggwan Lee, Seungwhun Paik, Youngsoo Shin |
| 2009 | ISLPED | Frequency and yield optimization using power gates in power-constrained designs. | Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin |
| 2008 | ASPDAC | Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation. | Jinseob Jeong, Seungwhun Paik, Youngsoo Shin |
| 2008 | DAC | Multiobjective optimization of sleep vector for zigzag power-gated circuits in standard cell elements. | Seungwhun Paik, Youngsoo Shin |
| 2008 | ICCAD | Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits. | Hyein Lee, Seungwhun Paik, Youngsoo Shin |
| 2008 | ISCAS | 3-D thermal simulation with dynamic power profiles. | Eunjoo Choi, Youngsoo Shin |
| 2008 | ISLPED | Power-gating-aware high-level synthesis. | Eunjoo Choi, Changsik Shin, Taewhan Kim, Youngsoo Shin |
| 2007 | ASPDAC | Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. | Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi |
| 2007 | DAC | Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits. | Jun Seomun, Jaehyun Kim, Youngsoo Shin |
| 2007 | ICCAD | Minimizing leakage power in sequential circuits by using mixed | Jaehyun Kim, Youngsoo Shin |
| 2006 | ASPDAC | Analysis and optimization of gate leakage current of power gating circuits. | Hyung-Ock Kim, Youngsoo Shin |
| 2006 | DAC | Physical design methodology of power gating circuits for standard-cell-based design. | Hyung-Ock Kim, Youngsoo Shin, Hyuk Kim, Iksoo Eo |
| 2005 | ISCAS | Power-aware slack distribution for hierarchical VLSI design. | Hyung-Ock Kim, Youngsoo Shin |
| 2005 | ISCAS | Analysis of power consumption in VLSI global interconnects. | Youngsoo Shin, Hyung-Ock Kim |
| 2004 | ISLPED | Architecting voltage islands in core-based system-on-a-chip designs. | Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu |
| 2001 | DAC | Coupling-Driven Bus Design for Low-Power Application-Specific Systems. | Youngsoo Shin, Takayasu Sakurai |
| 2001 | ISLPED | Estimation of power distribution in VLSI interconnects. | Youngsoo Shin, Takayasu Sakurai |
| 2000 | ASPDAC | Narrow bus encoding for low power systems. | Youngsoo Shin, Kiyoung Choi |
| 2000 | DAC | Schedulability-driven performance analysis of multiple mode embedded real-time systems. | Youngsoo Shin, Daehong Kim, Kiyoung Choi |
| 2000 | ICCAD | Power Optimization of Real-Time Embedded Systems on Variable Speed Processors. | Youngsoo Shin, Kiyoung Choi, Takayasu Sakurai |
| 1999 | DAC | Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems. | Youngsoo Shin, Kiyoung Choi |
| 1998 | ISLPED | Partial bus-invert coding for power optimization of system level bus. | Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi |
| 1996 | DATE | Thread-based software synthesis for embedded system design. | Youngsoo Shin, Kiyoung Choi |
| 1996 | ICCAD | Software synthesis through task decomposition by dependency analysis. | Youngsoo Shin, Kiyoung Choi |
| 1996 | RSP | An integrated hardware-software cosimulation environment with automated interface generation. | Kyuseok Kim, Yongjoo Kim, Youngsoo Shin, Kiyoung Choi |
| 1995 | ASPDAC | An integrated hardware-software cosimulation environment for heterogeneous systems prototyping. | Yongjoo Kim, Kyuseok Kim, Youngsoo Shin, Taekyoon Ahn, Wonyong Sung, Kiyoung Choi, Soonhoi Ha |
| 1995 | ISCAS | Efficient Prototyping System Based on Incremental Design and Module-by-Module Verification. | Yongjoo Kim, Youngsoo Shin, Kyuseok Kim, Jae-Hee Won, Kiyoung Choi |