| 2026 | ASPDAC | Viper: An ILP-Based Vectorization Framework for Fully Homomorphic Encryption. | Weidong Yang, Xinmo Li, Xiangmin Guo, Jianfei Jiang, Naifeng Jing, Qin Wang, Zhigang Mao, Weiguang Sheng |
| 2026 | ISCA | CHIME: A Case for Efficient Long-Context Attention-FC Disaggregated Inference with DIMM-PIM. | Qingyuan Liu, Liyan Chen, Haocheng Wang, Yanning Yang, Dong Du, Zhigang Mao, Naifeng Jing, Yubin Xia, Haibo Chen |
| 2025 | ASPDAC | MDNMP: Metapath-Driven Software-Hardware Co-Design for HGNN Acceleration with Near-Memory Processing. | Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2025 | DAC | AttenPIM: Accelerating LLM Attention with Dual-mode GEMV in Processing-in-Memory. | Liyan Chen, Dongxu Lyu, Zhenyu Li, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2025 | DAC | EPIC: Error PredIction and Correction for Power-Efficient Voltage Underscaling Multiply-Accumulate Unit. | Tongjing Wu, Xiaolu Hu, Tong Li, Siting Liu, Hui Wang, Weifeng He, Zhigang Mao, Honglan Jiang |
| 2025 | DATE | A Low-Power Mixed-Precision Integrated Multiply-Accumulate Architecture for Quantized Deep Neural Networks. | Xiaolu Hu, Xinkuang Geng, Zhigang Mao, Jie Han, Honglan Jiang |
| 2025 | DATE | HEILP: An ILP-Based Scale Management Method for Homomorphic Encryption Compiler. | Weidong Yang, Shuya Ji, Jianfei Jiang, Naifeng Jing, Qin Wang, Zhigang Mao, Weiguang Sheng |
| 2025 | HPCA | AsyncDIMM: Achieving Asynchronous Execution in DIMM-Based Near-Memory Processing. | Liyan Chen, Dongxu Lyu, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2024 | ASPDAC | Bridge-NDP: Achieving Efficient Communication-Computation Overlap in Near Data Processing with Bridge Architecture. | Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2024 | ASPDAC | SparGNN: Efficient Joint Feature-Model Sparsity Exploitation in Graph Neural Network Acceleration. | Chen Yin, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2023 | ASPDAC | An Efficient near-Bank Processing Architecture for Personalized Recommendation System. | Yuqing Yang, Weidong Yang, Qin Wang, Naifeng Jing, Jianfei Jiang, Zhigang Mao, Weiguang Sheng |
| 2023 | FPL | Pipeline Balancing for Integrated Mapping in High Performance Spatial Programmable Architecture. | Pengyu Liu, Zihan Zhang, Chen Yin, Liyan Chen, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing |
| 2021 | DAC | CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement. | Chuxiong Lin, Weifeng He, Yanan Sun, Zhigang Mao, Mingoo Seok |
| 2021 | DATE | Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture. | Yuge Chen, Zhongyuan Zhao, Jianfei Jiang, Guanghui He, Zhigang Mao, Weiguang Sheng |
| 2021 | DATE | Subgraph Decoupling and Rescheduling for Increased Utilization in CGRA Architecture. | Chen Yin, Qin Wang, Jianfei Jiang, Weiguang Sheng, Guanghui He, Zhigang Mao, Naifeng Jing |
| 2019 | ISPASS | mRNA: Enabling Efficient Mapping Space Exploration for a Reconfiguration Neural Accelerator. | Zhongyuan Zhao, Hyoukjun Kwon, Sachit Kuhar, Weiguang Sheng, Zhigang Mao, Tushar Krishna |
| 2018 | DATE | Optimizing the data placement and transformation for multi-bank CGRA computing system. | Zhongyuan Zhao, Yantao Liu, Weiguang Sheng, Tushar Krishna, Qin Wang, Zhigang Mao |
| 2017 | ASPDAC | Reliability analysis of memories suffering MBUs for the effect of negative bias temperature instability. | Shanshan Liu, Liyi Xiao, Xuebing Cao, Zhigang Mao |
| 2017 | DATE | A static-placement, dynamic-issue framework for CGRA loop accelerator. | Zhongyuan Zhao, Weiguang Sheng, Weifeng He, Zhigang Mao, Zhaoshi Li |
| 2015 | ICCAD | Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs. | Naifeng Jing, Jiacheng Zhou, Jianfei Jiang, Xin Chen, Weifeng He, Zhigang Mao |
| 2015 | PRDC | Parasitic Parameters Impacts Investigation on Soft Error Rate by a Circuit Level Framework. | Weiguang Sheng, Zhongyuan Zhao, Zhigang Mao |
| 2014 | ISCAS | Area and throughput efficient IDCT/IDST architecture for HEVC standard. | Ziyou Yao, Weifeng He, Liang Hong, Guanghui He, Zhigang Mao |
| 2013 | CIS | A Block Cipher Circuit Design against Power Analysis. | Yuxiao Ling, Zheng Guo, Zhimin Zhang, Zhigang Mao, Zeleng Zhuang |
| 2013 | ISCA | An energy-efficient and scalable eDRAM-based register file architecture for GPGPU. | Naifeng Jing, Yao Shen, Yao Lu, Shrikanth Ganapathy, Zhigang Mao, Minyi Guo, Ramon Canal, Xiaoyao Liang |
| 2011 | FPGA | Fault modeling and characteristics of SRAM-based FPGAs (abstract only). | Naifeng Jing, Ju-Yueh Lee, Chun Zhang, Jiarong Tong, Zhigang Mao, Lei He |
| 2011 | FPL | Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. | Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He |
| 2011 | ICCAD | Mitigating FPGA interconnect soft errors by in-place LUT inversion. | Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He |
| 2011 | ISCAS | Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems. | Yuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao |
| 2011 | ISCAS | A thermal-aware task mapping flow for coarse-grain dynamic reconfigurable processor. | Li Xie, Weifeng He, Naifeng Jing, Zhigang Mao |
| 2009 | DAC | Soft error optimization of standard cell circuits based on gate sizing and multi-objective genetic algorithm. | Weiguang Sheng, Liyi Xiao, Zhigang Mao |
| 2008 | EUC | A Hybrid Anti-Collision Algorithm for RFID with Enhanced Throughput and Reduced Memory Consumption. | Majun Zheng, Jing Xie, Zhigang Mao, Yongxin Zhu |
| 2008 | PRDC | Versatile and Efficient Techniques for Speeding-Up Circuit Level Simulated Fault-Injection Campaigns. | Weiguang Sheng, Liyi Xiao, Zhigang Mao |
| 2005 | ISCAS | Efficient frame-level pipelined array architecture for full-search block-matching motion estimation. | Weifeng He, Yunlong Bi, Zhigang Mao |
| 2004 | ICASSP | An adaptive motion estimation algorithm based on evolution strategies. | Hui Wang, Zhigang Mao |
| 2004 | ICIP | An adaptive motion estimation algorithm based on evolution strategies with correlated mutations. | Hui Wang, Zhigang Mao |