| 2008 | Best ways to use billions of devices on a wireless mobile SoC. | KyungHo Kim |
| 2008 | NBTI induced performance degradation in logic and memory circuits: how effectively can we approach a reliability solution? | Kunhyuk Kang, Saakshi Gangwal, Sang Phill Park, Kaushik Roy |
| 2008 | Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches. | Minje Jun, Sungjoo Yoo, Eui-Young Chung |
| 2008 | A stochastic local hot spot alerting technique. | Hwisung Jung, Massoud Pedram |
| 2008 | A 1.2GHz delayed clock generator for high-speed microprocessors. | Inhwa Jung, Moo-young Kim, Chulwoo Kim |
| 2008 | Scheduling with integer time budgeting for low-power optimization. | Wei Jiang, Zhiru Zhang, Miodrag Potkonjak, Jason Cong |
| 2008 | A symbolic approach for mixed-signal model checking. | Alexander Jesser, Lars Hedrich |
| 2008 | Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation. | Jinseob Jeong, Seungwhun Paik, Youngsoo Shin |
| 2008 | Predictive power aware management for embedded mobile devices. | Young-Si Hwang, Sung-Kwan Ku, Chan-Min Jung, Ki-Seok Chung |
| 2008 | The evolution of SoC platform according to the new mobile paradigm. | Ki-Soo Hwang |
| 2008 | Block remap with turnoff: A variation-tolerant cache design technique. | Mohammed Abid Hussain, Madhu Mutyam |
| 2008 | Localized random access scan: Towards low area and routing overhead. | Yu Hu, Xiang Fu, Xiaoxin Fan, Hideo Fujiwara |
| 2008 | Full-chip thermal analysis for the early design stage via generalized integral transforms. | Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee |
| 2008 | A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing. | Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-Shih Huang |
| 2008 | Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block selection algorithm. | Jui-Yuan Hsieh, Shanq-Jang Ruan |
| 2008 | Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. | Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang |
| 2008 | Non-Gaussian Statistical Timing models of die-to-die and within-die parameter variations for full chip analysis. | Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya |
| 2008 | Global optimization of common subexpressions for multiplierless synthesis of multiple constant multiplications. | Yuen-Hong Alvin Ho, Chi-Un Lei, Hing-Kit Kwan, Ngai Wong |
| 2008 | Reaching the limits of low power design. | J. S. Hobbs, Thomas W. Williams |
| 2008 | Block cache for embedded systems. | Dominic Hillenbrand, Jrg Henkel |
| 2008 | A unified methodology for power supply noise reduction in modern microarchitecture design. | Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim |
| 2008 | Within-die process variations: How accurately can they be statistically modeled? | Brendan Hargreaves, Henrik Hult, Sherief Reda |
| 2008 | Clock tree synthesis with data-path sensitivity matching. | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown |
| 2008 | An efficient, fully nonlinear, variability-aware non-monte-carlo yield estimation procedure with applications to SRAM cells and ring oscillators. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2008 | Investigation of diffusion rounding for post-lithography analysis. | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester |