| 2006 | A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation. | Masafumi Onouchi, Tetsuya Yamada, Kimihiro Morikawa, Isamu Mochizuki, Hidetoshi Sekine |
| 2006 | Delay modeling and static timing analysis for MTCMOS circuits. | Naoaki Ohkubo, Kimiyoshi Usami |
| 2006 | Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs. | Hyunok Oh, Nikil D. Dutt, Soonhoi Ha |
| 2006 | Hardware debugging method based on signal transitions and transactions. | Nobuyuki Ohba, Kohji Takano |
| 2006 | EDA vendor adoption. | Hillel Ofek |
| 2006 | Effective platform-based development for large-scale systems design. | Yukichi Niwa |
| 2006 | Configurable multi-processor architecture and its processor element design. | Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura, Yuki Matsumoto, Masatsugu Kobayashi, Toshiyuki Kato, Tsutomu Eda, Hironori Yamauchi |
| 2006 | CGTA: current gain-based timing analysis for logic cells. | Shahin Nazarian, Massoud Pedram, Tao Lin, Emre Tuncer |
| 2006 | A fast logic simulator using a look up table cascade emulator. | Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura |
| 2006 | Programmable numerical function generators based on quadratic approximation: architecture and synthesis method. | Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler |
| 2006 | Mapping and configuration methods for multi-use-case networks on chips. | Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli |
| 2006 | The design and implementation of a low-latency on-chip network. | Robert Mullins, Andrew West, Simon W. Moore |
| 2006 | A memory grouping method for sharing memory BIST logic. | Masahide Miyazaki, Tomokazu Yoneda, Hideo Fujiwara |
| 2006 | Current trends in flash memory technology: invited paper. | Sang Lyul Min, Eyee Hyun Nam |
| 2006 | A new test and characterization scheme for 10+ GHz low jitter wide band PLL. | Kazuhiko Miki, David Boerstler, Eskinder Hailu, Jieming Qi, Sarah Pettengill, Yuichi Goto |
| 2006 | Untitled record | Michael S. McCorquodale, James McCann, Richard B. Brown |
| 2006 | Yield-preferred via insertion based on novel geotopological technology. | Fangyi Luo, Yongbo Jia, Wayne Wei-Ming Dai |
| 2006 | Signal-path driven partition and placement for analog circuit. | Di Long, Xianlong Hong, Sheqin Dong |
| 2006 | Power driven placement with layout aware supply voltage assignment for voltage island generation in Dual-Vdd designs. | Bin Liu, Yici Cai, Qiang Zhou, Xianlong Hong |
| 2006 | A quasi-newton preconditioned Newton-Krylov method for robust and efficient time-domain simulation of integrated circuits with strong parasitic couplings. | Zhao Li, Chuanjin Richard Shi |
| 2006 | An | Zhuo Li, Weiping Shi |
| 2006 | Design space exploration for minimizing multi-project wafer production cost. | Rung-Bin Lin, Meng-Chiou Wu, Wei-Chiu Tseng, Ming-Hsine Kuo, Tsai-Ying Lin, Shr-Cheng Tsai |
| 2006 | Algorithms and DSP implementation of H.264/AVC. | Hung-Chih Lin, Yu-Jen Wang, Kai-Ting Cheng, Shang-Yu Yeh, Wei-Nien Chen, Chia-Yang Tsai, Tian-Sheuan Chang, Hsueh-Ming Hang |
| 2006 | IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults. | Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, Chung-Len Lee, Jwu E. Chen |
| 2006 | SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar processor design. | Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh |