| 1995 | Routing on regular segmented 2-D FPGAs. | Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1995 | Design automation 2000 (panel session): challenges for gigabit-era. | Richard K. Wallace |
| 1995 | Design automation for integrated continuous-time filters using integrators. | Kazuyuki Wada, Shigetaka Takagi, Zdzislaw Czarnul, Nobuo Fujii |
| 1995 | Future direction of synthesizabilty and interoperability of HDL's: part 2. | Eugenio Villar, Masaharu Imai |
| 1995 | Synthesis and simulation of digital demodulator for infrared data communication. | Hiroshi Uno, Toru Chiba, Keiji Kumatani, Isao Shirakawa |
| 1995 | Auriga2: a 4.7 million-transistor CISC microprocessor. | J. P. Tual, Michel Thill, C. Bernard, Huy Nam Nguyen, F. Mottini, M. Moreau, P. Vallet |
| 1995 | A three-layer over-cell multi-channel routing method for a new cell model. | Masahiro Tsuchiya, Tetsushi Koide, Shin'ichi Wakabayashi, Noriyoshi Yoshida |
| 1995 | Performance driven multiple-source bus synthesis using buffer insertion. | Chia-Chun Tsai, De-Yu Kao, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1995 | Maple-opt: a simultaneous technology mapping, placement, and global routing algorithm FPGAs with performance optimization. | Nozomu Togawa, Masao Sato, Tatsuo Ohtsuki |
| 1995 | Power analysis of a 32-bit embedded microcontroller. | Vivek Tiwari, Mike Tien-Chien Lee |
| 1995 | A robust min-cut improvement algorithm based on dynamic look-ahead weighting. | Katsunori Tani |
| 1995 | Electronic data book: current status of standard representation and future perspective. | Kinya Tabuchi |
| 1995 | Some remarks about spectral transform interpretation of MTBDDs and EVBDDs. | Radomir S. Stankovic |
| 1995 | A framework for the analysis and design of algorithms for a class of VLSI-CAD optimization problems. | Chuanjin Richard Shi, Janusz A. Brzozowski |
| 1995 | Transistor reordering rules for power reduction in CMOS gates. | Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang |
| 1995 | Communication based FPGA synthesis for multi-output Boolean functions. | Christoph Scholl, Paul Molitor |
| 1995 | Timing influenced generell-cell genetic floorplanner. | Sadiq M. Sait, Habib Youssef, Shahid K. Tanvir, Muhammad S. T. Benten |
| 1995 | A new K-way partitioning approach for multiple types of FPGAs. | Bernhard M. Riess, Heiko A. Giselbrecht, Bernd Wurth |
| 1995 | Optimum PLA folding through boolean satisfiability. | Jos M. Quintana, Maria J. Avedillo, Maria P. Parra, Jos L. Huertas |
| 1995 | Synthesis-for-testability using transformations. | Miodrag Potkonjak, Sujit Dey, Rabindra K. Roy |
| 1995 | System-level verification of CDMA modem ASIC. | Gyeong Lyong Park, Kyung Hi Chang, Jae Seok Kim, Kyung Soo Kim |
| 1995 | A design of high-performance multiplier for digital video transmission. | Keisuke Okada, Shun Morikawa, Isao Shirakawa, Sumitaka Takeuchi |
| 1995 | A layout approach to Monolithic Microwave IC. | Akira Nagao, Chiyoshi Yoshioka, Takashi Kambe, Isao Shirakawa |
| 1995 | Design for testability using register-transfer level partial scan selection. | Akira Motohara, Sadami Takeoka, Toshinori Hosokawa, Mitsuyasu Ohta, Yuji Takai, Michihiro Matsumoto, Michiaki Muraoka |
| 1995 | A scheduling algorithm for synthesis of bus-partitioned architectures. | Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi Tamaru |