| 2024 | On Decomposing Complex Test Cases for Efficient Post-silicon Validation. | C. Harshitha, Sundarapalli Harikrishna, Peddakotla Rohith, Sandeep Chandran, Rajshekar Kalayappan |
| 2024 | FuseFPS: Accelerating Farthest Point Sampling with Fusing KD-tree Construction for Point Clouds. | Meng Han, Liang Wang, Limin Xiao, Hao Zhang, Chenhao Zhang, Xilong Xie, Shuai Zheng, Jin Dong |
| 2024 | RobustDiCE: Robust and Distributed CNN Inference at the Edge. | Xiaotian Guo, Quan Jiang, Andy D. Pimentel, Todor P. Stefanov |
| 2024 | Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data. | Tom Glint, Manu Awasthi, Joycee Mekie |
| 2024 | CANSim: When to Utilize Synchronous and Asynchronous Routers in Large and Complex NoCs. | Tom Glint, Manu Awasthi, Joycee Mekie |
| 2024 | A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. | Xuchen Gao, Yunhui Qiu, Yuan Dai, Wenbo Yin, Lingli Wang |
| 2024 | Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge. | Weimin Fu, Shijie Li, Yifang Zhao, Haocheng Ma, Raj Gautam Dutta, Xuan Zhang, Kaichen Yang, Yier Jin, Xiaolong Guo |
| 2024 | CoPlace: Coherent Placement Engine with Layout-aware Partitioning for 3D ICs. | Bangqi Fu, Lixin Liu, Yang Sun, Wing Ho Lau, Martin D. F. Wong, Evangeline F. Y. Young |
| 2024 | A Fast and Robust Global Router with Capacity Reduction Techniques. | Yun-Kai Fang, Ye-Chih Lin, Ting-Chi Wang |
| 2024 | Towards Finding the Sources of Polymorphism in Polymorphic Gates (Invited). | Timothy Dunlap, Zelin Lu, Gang Qu |
| 2024 | The Need for Speed: Efficient Exact Simulation of Silicon Dangling Bond Logic. | Jan Drewniok, Marcel Walter, Robert Wille |
| 2024 | SWAT: An Efficient Swin Transformer Accelerator Based on FPGA. | Qiwei Dong, Xiaoru Xie, Zhongfeng Wang |
| 2024 | SPIRAL: Signal-Power Integrity Co-Analysis for High-Speed Inter-Chiplet Serial Links Validation. | Xiao Dong, Songyu Sun, Yangfan Jiang, Jingtong Hu, Dawei Gao, Cheng Zhuo |
| 2024 | FormalFuzzer: Formal Verification Assisted Fuzz Testing for SoC Vulnerability Detection. | Nusrat Farzana Dipu, Muhammad Monir Hossain, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor |
| 2024 | APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction. | Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li |
| 2024 | d-GUARD: Thwarting Denial-of-Service Attacks via Hardware Monitoring of Information Flow using Language Semantics in Embedded Systems. | Garett Cunningham, Harsha Chenji, David Juedes, Avinash Karanth |
| 2024 | Security Coverage Metrics for Information Flow at the System Level. | Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler |
| 2024 | Physics-Informed Learning for EPG-Based TDDB Assessment. | Dinghao Chen, Wenjie Zhu, Xiaoman Yang, Pengpeng Ren, Zhigang Ji, Hai-Bao Chen |
| 2024 | SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design. | Shixin Chen, Su Zheng, Chen Bai, Wenqian Zhao, Shuo Yin, Yang Bai, Bei Yu |
| 2024 | ZEBRA: A Zero-Bit Robust-Accumulation Compute-In-Memory Approach for Neural Network Acceleration Utilizing Different Bitwise Patterns. | Yiming Chen, Guodong Yin, Hongtao Zhong, Mingyen Lee, Huazhong Yang, Sumitha George, Vijaykrishnan Narayanan, Xueqing Li |
| 2024 | LOOPLock 3.0: A Robust Cyclic Logic Locking Approach. | Pei-Pei Chen, Xiang-Min Yang, Yu-Cheng He, Yung-Chih Chen, Yi-Ting Li, Chun-Yao Wang |
| 2024 | Quantization-aware Optimization Approach for CNNs Inference on CPUs. | Jiasong Chen, Zeming Xie, Weipeng Liang, Bosheng Liu, Xin Zheng, Jigang Wu, Xiaoming Xiong |
| 2024 | MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier. | Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng |
| 2024 | Boosting Graph Spectral Sparsification via Parallel Sparse Approximate Inverse of Cholesky Factor. | Baiyu Chen, Zhiqiang Liu, Yibin Zhang, Wenjian Yu |
| 2024 | Heterogeneous Graph Attention Network Based Statistical Timing Library Characterization with Parasitic RC Reduction. | Xu Cheng, Yuyang Ye, Guoqing He, Qianqian Song, Peng Cao |