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Asia and South Pacific Design Automation Conference

ASPDAC

B

CORE rank

CORE rank (raw)

B

Fields of research

Distributed Computing and Systems Software

Papers indexed

4,548

1995–2026

Papers per year

1995301 peak2026

ASPDAC papers

4,548 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2021Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks.Grace Li Zhang, Bing Li, Ying Zhu, Tianchen Wang, Yiyu Shi, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, Ulf Schlichtmann
2021Connection-based Processing-In-Memory Engine Design Based on Resistive Crossbars.Shuhang Zhang, Hai Helen Li, Ulf Schlichtmann
2021A DSM-based Polar Transmitter with 23.8% System Efficiency.Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Atsushi Shirane, Kenichi Okada
2021A Multiple-Precision Multiply and Accumulation Design with Multiply-Add Merged Strategy for AI Accelerating.Song Zhang, Jiangyuan Gu, Shouyi Yin, Leibo Liu, Shaojun Wei
2021Approximate Computing for ML: State-of-the-art, Challenges and Visions.Georgios Zervakis, Hassaan Saadat, Hussam Amrouch, Andreas Gerstlauer, Sri Parameswaran, Jrg Henkel
2021Advancements and Challenges on Parasitic Extraction for Advanced Process Technologies.Wenjian Yu, Mingye Song, Ming Yang
2021A Decomposition-Based Synthesis Algorithm for Sparse Matrix-Vector Multiplication in Parallel Communication Structure.Mingfei Yu, Ruitao Gao, Masahiro Fujita
2021Machine Learning-based Structural Pre-route Insertability Prediction and Improvement with Guided Backpropagation.Tao-Chun Yu, Shao-Yun Fang, Hsien-Shih Chiu, Kai-Shun Hu, Chin-Hsiung Hsu, Philip Hui-Yuh Tai, Cindy Chin-Fang Shen
2021On Designing Computing Systems for Autonomous Vehicles: a PerceptIn Case Study.Bo Yu, Jie Tang, Shaoshan Liu
2021An Adaptive Delay Model for Timing Yield Estimation under Wide-Voltage Range.Hao Yan, Xiao Shi, Chengzhen Xuan, Peng Cao, Longxing Shi
2021Uncertainty Modeling of Emerging Device based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search.Zheyu Yan, Da-Cheng Juan, Xiaobo Sharon Hu, Yiyu Shi
2021Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method.Haoyu Yang, Shifan Zhang, Kang Liu, Siting Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg, Bei Yu, Evangeline F. Y. Young
2021Dynamic Programming Assisted Quantization Approaches for Compressing Normal and Robust DNN Models.Dingcheng Yang, Wenjian Yu, Haoyuan Mu, Gary Yao
2021Dynamic Neural Network to Enable Run-Time Trade-off between Accuracy and Latency.Li Yang, Deliang Fan
2021Security of Neural Networks from Hardware Perspective: A Survey and Beyond.Qian Xu, Md Tanvir Arafin, Gang Qu
2021Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation.Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Yixiao Duan, Yiran Chen
2021Manufacturing-Aware Power Staple Insertion Optimization by Enhanced Multi-Row Detailed Placement Refinement.Yu-Jin Xie, Kuan-Yu Chen, Wai-Kei Mak
2021Normalized Stability: A Cross-Level Design Metric for Early Termination in Stochastic Computing.Di Wu, Ruokai Yin, Joshua San Miguel
2021Value-Aware Error Detection and Correction for SRAM Buffers in Low-Bitwidth, Floating-Point CNN Accelerators.Jun-Shen Wu, Chi-En Wang, Ren-Shuo Liu
2021A Novel Technology Mapper for Complex Universal Gates.Meng-Che Wu, Ai Quoc Dao, Mark Po-Hung Lin
2021Lightweight Run-Time Working Memory Compression for Deployment of Deep Neural Networks on Resource-Constrained MCUs.Zhepeng Wang, Yawen Wu, Zhenge Jia, Yiyu Shi, Jingtong Hu
2021A Low Cost Weight Obfuscation Scheme for Security Enhancement of ReRAM Based Neural Network Accelerators.Yuhang Wang, Song Jin, Tao Li
2021Power-Efficient Layer Mapping for CNNs on Integrated CPU and GPU Platforms: A Case Study.Tian Wang, Kun Cao, Junlong Zhou, Gongxuan Zhang, Xiji Wang
2021One-pass Synthesis for Field-coupled Nanocomputing Technologies.Marcel Walter, Winston Haaswijk, Robert Wille, Frank Sill Torres, Rolf Drechsler
2021A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC.Hai-Dang Vu, Sbastien Le Nours, Sbastien Pillement, Ralf Stemmer, Kim Grttner
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