| 2018 | Tutorial-1: Machine learning and deep learning. | Jinjun Xiong |
| 2018 | Pairing of microring-based silicon photonic transceivers for tuning power optimization. | Rui Wu, M. Ashkan Seyedi, Yuyang Wang, Jared Hulme, Marco Fiorentino, Raymond G. Beausoleil, Kwang-Ting Cheng |
| 2018 | A channel-sharable built-in self-test scheme for multi-channel DRAMs. | Kuan-Te Wu, Jin-Fu Li, Chih-Yen Lo, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou |
| 2018 | A conflict-free approach for parallelizing SAT-based de-camouflaging attacks. | Xueyan Wang, Qiang Zhou, Yici Cai, Gang Qu |
| 2018 | ASAX: Automatic security assertion extraction for detecting Hardware Trojans. | Chenguang Wang, Yici Cai, Qiang Zhou, Haoyi Wang |
| 2018 | Polymorphic gate based IC watermarking techniques. | Tian Wang, Xiaoxin Cui, Dunshan Yu, Omid Aramoon, Timothy Dunlap, Gang Qu, Xiaole Cui |
| 2018 | A low-overhead PUF based on parallel scan design. | Wenxuan Wang, Aijiao Cui, Gang Qu, Huawei Li |
| 2018 | HLIFT: A high-level information flow tracking method for detecting hardware Trojans. | Chenguang Wang, Yici Cai, Qiang Zhou |
| 2018 | OCV guided clock tree topology reconstruction. | Necati Uysal, Rickard Ewetz |
| 2018 | On enabling diagnosis for 1-Pin Test fails in an industrial flow. | Daniel Tille, Benedikt Gottinger, Ulrike Pfannkuchen, Helmut Graeb, Ulf Schlichtmann |
| 2018 | Multi-device collaborative management through knowledge sharing. | Zhongyuan Tian, Zhe Wang, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda, Jiang Xu |
| 2018 | Clustering of flip-flops for useful-skew clock tree synthesis. | Chuan Yean Tan, Rickard Ewetz, Cheng-Kok Koh |
| 2018 | Accelerating electromigration aging for fast failure detection for nanometer ICs. | Zeyu Sun, Sheriff Sadiqbatcha, Hengyang Zhao, Sheldon X.-D. Tan |
| 2018 | Fully parallel RRAM synaptic array for implementing binary neural network with (+1, -1) weights and (+1, 0) neurons. | Xiaoyu Sun, Xiaochen Peng, Pai-Yu Chen, Rui Liu, Jae-sun Seo, Shimeng Yu |
| 2018 | Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array. | Wenyu Sun, Yuxuan Huang, Qinghang Zhao, Fei Qiao, Tsung-Yi Ho, Xiaojun Guo, Huazhong Yang, Yongpan Liu |
| 2018 | A low-power wide dynamic-range current readout circuit for biosensors. | Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim |
| 2018 | SQLiteKV: An efficient LSM-tree-based SQLite-like database engine for mobile devices. | Yuanjing Shi, Zhaoyan Shen, Zili Shao |
| 2018 | A reconfigurable SIMO system with 10-output dual-bus DC-DC converter using the load balancing function in group allocator for diversified load condition. | Se-un Shin, Sang-Hui Park, Gyu-Hyeong Cho |
| 2018 | Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC. | Minseob Shim, Seokhyeon Jeong, Paul D. Myers, Suyoung Bang, Junhua Shen, Chulwoo Kim, Dennis Sylvester, David T. Blaauw, Wanyeong Jung |
| 2018 | A comparative investigation of approximate attacks on logic encryptions. | Yuanqi Shen, Amin Rezaei, Hai Zhou |
| 2018 | Process design kit for flexible hybrid electronics. | Leilai Shao, Tsung-Ching Huang, Ting Lei, Zhenan Bao, Raymond G. Beausoleil, Kwang-Ting Cheng |
| 2018 | Multi-level timing simulation on GPUs. | Eric Schneider, Michael A. Kochte, Hans-Joachim Wunderlich |
| 2018 | SAT-based area recovery in structural technology mapping. | Bruno de O. Schmitt, Alan Mishchenko, Robert K. Brayton |
| 2018 | Process variation and temperature aware adaptive scrubbing for retention failures in STT-MRAM. | Nour Sayed, Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
| 2018 | Power conversion efficiency-aware mapping of multithreaded applications on heterogeneous architectures: A comprehensive parameter tuning. | Hossein Sayadi, Divya Pathak, Ioannis Savidis, Houman Homayoun |