| 2019 | Software defined architectures for data analytics. | Vito Giovanni Castellana, Marco Minutoli, Antonino Tumeo, Marco Lattuada, Pietro Fezzardi, Fabrizio Ferrandi |
| 2019 | Learning-based prediction of package power delivery network quality. | Yi Cao, Andrew B. Kahng, Joseph Li, Abinash Roy, Vaishnav Srinivas, Bangqi Xu |
| 2019 | ADEPOS: anomaly detection based power saving for predictive maintenance using edge computing. | Sumon Kumar Bose, Bapi Kar, Mohendra Roy, Pradeep Kumar Gopalakrishnan, Arindam Basu |
| 2019 | Towards practical homomorphic email filtering: a hardware-accelerated secure nave bayesian filter. | Song Bian, Masayuki Hiromoto, Takashi Sato |
| 2019 | Towards limiting the impact of timing anomalies in complex real-time processors. | Pedro Benedicte, Jaume Abella, Carles Hernndez, Enrico Mezzetti, Francisco J. Cazorla |
| 2019 | SAADI: a scalable accuracy approximate divider for dynamic energy-quality scaling. | Setareh Behroozi, Jingjie Li, Jackson Melchert, Younghyun Kim |
| 2019 | Machine learning and structural characteristics for reverse engineering. | Johanna Baehr, Alessandro Bernardini, Georg Sigl, Ulf Schlichtmann |
| 2019 | Efficient sparsification of dense circuit matrices in model order reduction. | Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis |
| 2019 | ParaPIM: a parallel processing-in-memory accelerator for binary-weight deep neural networks. | Shaahin Angizi, Zhezhi He, Deliang Fan |
| 2019 | ScanSAT: unlocking obfuscated scan chains. | Lilas Alrahis, Muhammad Yasin, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu |
| 2019 | S | Mohamed Baker Alawieh, Xiyuan Tang, David Z. Pan |
| 2019 | Collaborative accelerators for in-memory MapReduce on scale-up machines. | Abraham Addisie, Valeria Bertacco |
| 2018 | Exploiting coding techniques for logic synthesis of reversible circuits. | Alwin Zulehner, Robert Wille |
| 2018 | XORiM: A case of in-memory bit-comparator implementation and its performance implications. | Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li |
| 2018 | Electromigration-lifetime constrained power grid optimization considering multi-segment interconnect wires. | Han Zhou, Yijing Sun, Zeyu Sun, Hengyang Zhao, Sheldon X.-D. Tan |
| 2018 | Logic synthesis for energy-efficient photonic integrated circuits. | Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan |
| 2018 | A deep reinforcement learning framework for optimizing fuel economy of hybrid electric vehicles. | Pu Zhao, Yanzhi Wang, Naehyuck Chang, Qi Zhu, Xue Lin |
| 2018 | Quad-multiplier packing based on customized floating point for convolutional neural networks on FPGA. | Zhifeng Zhang, Dajiang Zhou, Shihao Wang, Shinji Kimura |
| 2018 | Performance analysis on structure of racetrack memory. | Hongbin Zhang, Chao Zhang, Qingda Hu, Chengmo Yang, Jiwu Shu |
| 2018 | Exploring energy and accuracy tradeoff in structure simplification of trained deep neural networks. | Boyu Zhang, Azadeh Davoodi, Yu Hen Hu |
| 2018 | Intelligent corner synthesis via cycle-consistent generative adversarial networks for efficient validation of autonomous driving systems. | Handi Yu, Xin Li |
| 2018 | Flip-chip routing with IO planning considering practical pad assignment constraints. | Tao-Chun Yu, Shao-Yun Fang |
| 2018 | Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers. | Seyeon Yoo, Seojin Choi, Juyeop Kim, Heein Yoon, Yongsun Lee, Jaehyouk Choi |
| 2018 | A low-power high-speed accuracy-controllable approximate multiplier design. | Tongxin Yang, Tomoaki Ukezono, Toshinori Sato |
| 2018 | PIMCH: Cooperative memory prefetching in processing-in-memory architecture. | Sheng Xu, Ying Wang, Yinhe Han, Xiaowei Li |