| 2016 | Sequence-pair-based placement and routing for flow-based microfluidic biochips. | Qin Wang, Yizhong Ru, Hailong Yao, Tsung-Yi Ho, Yici Cai |
| 2016 | A high performance reliable NoC router. | Lu Wang, Sheng Ma, Zhiying Wang |
| 2016 | Performance-centric register file design for GPUs using racetrack memory. | Shuo Wang, Yun Liang, Chao Zhang, Xiaolong Xie, Guangyu Sun, Yongpan Liu, Yu Wang, Xiuhong Li |
| 2016 | A 2.2W 15b incremental delta-sigma ADC with output-driven input segmentation. | Bo Wang, Man Kay Law, Saqib Mohamad, Amine Bermak |
| 2016 | STLAC: A spatial and temporal locality-aware cache and network-on-chip codesign for tiled many-core systems. | Mingyu Wang, Zhaolin Li |
| 2016 | Relay-based key management to support secure deletion for resource-constrained flash-memory storage devices. | Wei-Lin Wang, Yuan-Hao Chang, Po-Chun Huang, Chia-Heng Tu, Hsin-Wen Wei, Wei-Kuan Shih |
| 2016 | Efficient embedded learning for IoT devices. | Swagath Venkataramani, Kaushik Roy, Anand Raghunathan |
| 2016 | A lightweight OpenMP4 run-time for embedded systems. | Roberto Vargas, Sara Royuela, Maria A. Serrano, Xavier Martorell, Eduardo Quiones |
| 2016 | Design and verification using high-level synthesis. | Andrs Takach |
| 2016 | Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis. | Zelei Sun, Keith A. Campbell, Wei Zuo, Kyle Rupnow, Swathi T. Gurumani, Frederic Doucet, Deming Chen |
| 2016 | A routability-driven flow routing algorithm for programmable microfluidic devices. | Yi-Siang Su, Tsung-Yi Ho, Der-Tsai Lee |
| 2016 | Distributed reconfigurable Battery System Management Architectures. | Sebastian Steinhorst, Zili Shao, Samarjit Chakraborty, Matthias Kauer, Shuai Li, Martin Lukasiewycz, Swaminathan Narayanaswamy, Muhammad Usman Rafique, Qixin Wang |
| 2016 | A 200-MHz 4-phase fully integrated voltage regulator with local ground sensing dual loop ZDS hysteretic control using 6.5nH package bondwire inductors on 65nm bulk CMOS. | Minkyu Song, Joseph Sankman, Jayeol Lee, Dongsheng Brian Ma |
| 2016 | BDD minimization for approximate computing. | Mathias Soeken, Daniel Groe, Arun Chandrasekharan, Rolf Drechsler |
| 2016 | Dynamic planning of local congestion from varying-size vias for global routing layer assignment. | Daohang Shi, Edward Tashjian, Azadeh Davoodi |
| 2016 | Mask optimization for directed self-assembly lithography: Inverse DSA and inverse lithography. | Seongbo Shim, Youngsoo Shin |
| 2016 | Prospects of efficient neural computing with arrays of magneto-metallic neurons and synapses. | Abhronil Sengupta, Karthik Yogendra, Deliang Fan, Kaushik Roy |
| 2016 | Reliability, adaptability and flexibility in timing: Buy a life insurance for your circuits. | Ulf Schlichtmann, Masanori Hashimoto, Iris Hui-Ru Jiang, Bing Li |
| 2016 | Cross-layer virtual/physical sensing and actuation for resilient heterogeneous many-core SoCs. | Santanu Sarma, Tiago Mck, Majid Shoushtari, Abbas BanaiyanMofrad, Nikil D. Dutt |
| 2016 | Data privacy in non-volatile cache: Challenges, attack models and solutions. | Nitin Rathi, Swaroop Ghosh, Anirudh Iyengar, Helia Naeimi |
| 2016 | Advanced multi-patterning and hybrid lithography techniques. | Fedor G. Pikus, Andres J. Torres |
| 2016 | SMoSi: A framework for the derivation of sleep mode traces from RTL simulations. | Dustin Peterson, Oliver Bringmann |
| 2016 | Energy optimization of stochastic applications with statistical guarantees of deadline and reliability. | Xiong Pan, Wei Jiang, Ke Jiang, Liang Wen, Qi Dong |
| 2016 | Assessing CPA resistance of AES with different fault tolerance mechanisms. | Hoda Pahlevanzadeh, Jaya Dofe, Qiaoyan Yu |
| 2016 | Trace-based context-sensitive timing simulation considering execution path variations. | Sebastian Ottlik, Jan Micha Borrmann, Sadik Asbach, Alexander Viehl, Wolfgang Rosenstiel, Oliver Bringmann |