| 2010 | Logical Time at Work: Capturing Data Dependencies and Platform Constraints. | Calin Glitia, Julien DeAntoni, Frdric Mallet |
| 2010 | Modeling of Communication Infrastructure for Design-Space Exploration. | Franco Fummi, Davide Quaglia, Francesco Stefanni, Giovanni Lovato |
| 2010 | Evaluating Debugging Algorithms from a Qualitative Perspective. | Alexander Finder, Grschwin Fey |
| 2010 | Mapping of Concurrent Object-Oriented Models to Extended Real-Time Task Networks. | Matthias Bker, Kim Grttner, Philipp A. Hartmann, Ingo Stierand |
| 2010 | A Tripartite System Level Design Approach for Design Space Exploration. | Peter Brunmayr, Jan Haase, Christoph Grimm |
| 2010 | Functional Abstractions for UML Activity Diagrams. | Matthias Brettschneider, Tobias Hberlein |
| 2010 | Formal Verification of Timed VHDL Programs. | Abdelrezzak Bara, Pirouz Bazargan-Sabet, Remy Chevallier, Dominique Le D, Emmanuelle Encrenaz, Patricia Renault |
| 2010 | Using SystemCAMS for Heterogeneous Systems Modelling at TIER-1 Level. | Thomas Arndt, Thomas Uhle, Karsten Einwich, Ingmar Neumann |
| 2010 | Modeling Switched Capacitor Sigma Delta Modulator Nonidealities in SystemC-AMS. | Sumit Adhikari, Christoph Grimm |
| 2009 | Analysis of sense finger dynamics for accurate ΣΔ MEMS accelerometer modelling in VHDL-AMS. | Chenxu Zhao, Tom J. Kazmierski |
| 2009 | Fast and unified SystemC AMS - HDL simulation. | Yaseen Zaidi, Christoph Grimm, Jan Haase |
| 2009 | The application of Aspectual Feature Module in the development and verification of SystemC models. | Jun Ye, Tun Li, QingPing Tan |
| 2009 | Reuse of a HW/SW coverification environment during the refinement process of a functional C model down to an executable HW/SW specification. | Markus Winterholer, Florian Schfer |
| 2009 | SMT-based stimuli generation in the SystemC Verification library. | Robert Wille, Daniel Groe, Finn Haedicke, Rolf Drechsler |
| 2009 | Another take on functional system-level design and modeling. | Tomasz Toczek, Dominique Houzet, Stphane Mancini |
| 2009 | A top-down approach for the design of low-power microsensor nodes for wireless sensor network. | Guillaume Terrasson, Renaud Briand, Skandar Basrour, Valrie Dup |
| 2009 | Efficient approximately-timed performance modeling for architectural exploration of MPSoCs. | Martin Streubhr, Jens Gladigau, Christian Haubelt, Jrgen Teich |
| 2009 | A SystemC superset for high-level synthesis. | Maxim Smirnov, Andres Takach |
| 2009 | Understanding physical models in VHDL-AMS. | Abdulhadi Shoufan, Sorin Alexander Huss |
| 2009 | Rapid prototyping of a DVB-SH turbo decoder using high-level-synthesis. | Marko Rler, Hailu Wang, Ulrich Heinkel, Nur Engin, Wolfram Drescher |
| 2009 | Design of experiments for effective pre-silicon verification of automotive electronics. | Monica Rafaila, Christoph Decker, Georg Pelz, Christian Grimm |
| 2009 | A re-use methodology for formal SoC protocol compliance verification. | Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jrg Bormann |
| 2009 | Semi-automated Hw/Sw Co-design for embedded systems: from MARTE models to SystemC simulators. | Luis Gabriel Murillo, Marcello Mura, Mauro Prevostini |
| 2009 | Checkpoint and Restore for SystemC models. | Marius Monton, Jakob Engblom, Mark Burton |
| 2009 | Mixed simulation kernels for high performance virtual platforms. | Marius Monton, Jordi Carrabina, Mark Burton |