| 2014 | Strategies for anticipating risk in heterogeneous system design. | Marisabel Guevara, Benjamin Lubin, Benjamin C. Lee |
| 2014 | Atomic SC for simple in-order processors. | Dibakar Gope, Mikko H. Lipasti |
| 2014 | FADE: A programmable filtering accelerator for instruction-grain monitoring. | Sotiria Fytraki, Evangelos Vlachos, Yusuf Onur Koberber, Babak Falsafi, Boris Grot |
| 2014 | Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs. | Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Marten van Dijk, Omer Khan, Srinivas Devadas |
| 2014 | 3D stacking of high-performance processors. | Philip G. Emma, Alper Buyuktosunoglu, Michael B. Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime H. Moreno, Eren Kursun |
| 2014 | A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks. | Jesse Elwell, Ryan Riley, Nael B. Abu-Ghazaleh, Dmitry Ponomarev |
| 2014 | TSO-CC: Consistency directed cache coherence for TSO. | Marco Elver, Vijay Nagarajan |
| 2014 | A scalable multi-path microarchitecture for efficient GPU control flow. | Ahmed ElTantawy, Jessica Wenjie Ma, Mike O'Connor, Tor M. Aamodt |
| 2014 | QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers. | Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri |
| 2014 | Stash directory: A scalable directory for many-core coherence. | Socrates Demetriades, Sangyeun Cho |
| 2014 | MP3: Minimizing performance penalty for power-gating of Clos network-on-chip. | Lizhong Chen, Lihang Zhao, Ruisheng Wang, Timothy Mark Pinkston |
| 2014 | Improving DRAM performance by parallelizing refreshes with accesses. | Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu |
| 2014 | Understanding the impact of gate-level physical reliability effects on whole program execution. | Raghuraman Balasubramanian, Karthikeyan Sankaralingam |
| 2014 | STM: Cloning the spatial and temporal memory access behavior. | Amro Awad, Yan Solihin |
| 2014 | Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks. | Amin Ansari, Asit K. Mishra, Jianping Xu, Josep Torrellas |
| 2014 | DASCA: Dead Write Prediction Assisted STT-RAM Cache Architecture. | Junwhan Ahn, Sungjoo Yoo, Kiyoung Choi |
| 2014 | Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules. | Aditya Agrawal, Amin Ansari, Josep Torrellas |
| 2014 | Implications of high energy proportional servers on cluster-wide energy proportionality. | Daniel Wong, Murali Annavaram |
| 2013 | High-performance and energy-efficient mobile web browsing on big/little systems. | Yuhao Zhu, Vijay Janapa Reddi |
| 2013 | In-network traffic regulation for Transactional Memory. | Lihang Zhao, Woojin Choi, Lizhong Chen, Jeffrey T. Draper |
| 2013 | RECAP: A region-based cure for the common cold (cache). | Jason Zebchuk, Harold W. Cain, Xin Tong, Vijayalakshmi Srinivasan, Andreas Moshovos |
| 2013 | Accelerating write by exploiting PCM asymmetries. | Jianhui Yue, Yifeng Zhu |
| 2013 | Architecture support for guest-transparent VM protection from untrusted hypervisor and physical attacks. | Yubin Xia, Yutao Liu, Haibo Chen |
| 2013 | i | Jue Wang, Xiangyu Dong, Yuan Xie, Norman P. Jouppi |
| 2013 | A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments. | Yaohua Wang, Shuming Chen, Jianghua Wan, Jiayuan Meng, Kai Zhang, Wei Liu, Xi Ning |