| 2004 | Exploiting Prediction to Reduce Power on Buses. | Victor Wen, Mark Whitney, Yatish Patel, John Kubiatowicz |
| 2004 | Signature Buffer: Bridging Performance Gap between Registers and Caches. | Lu Peng, Jih-Kwon Peir, Konrad Lai |
| 2004 | Data Cache Prefetching Using a Global History Buffer. | Kyle J. Nesbit, James E. Smith |
| 2004 | Creating Converged Trace Schedules Using String Matching. | Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, Brad Calder |
| 2004 | Exploiting the Cache Capacity of a Single-Chip Multi-Core Processor with Execution Migration. | Pierre Michaud |
| 2004 | Architectural Characterization of TCP/IP Packet Processing on the Pentium M Microprocessor. | Srihari Makineni, Ravi R. Iyer |
| 2004 | Organizing the Last Line of Defense before Hitting the Memory Wall for CMP. | Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir |
| 2004 | The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors. | Jian Li, Jos F. Martnez, Michael C. Huang |
| 2004 | Understanding Scheduling Replay Schemes. | Ilhyun Kim, Mikko H. Lipasti |
| 2004 | Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses. | Mazen Kharbutli, Keith Irwin, Yan Solihin, Jaejin Lee |
| 2004 | Processor Aware Anticipatory Prefetching in Loops. | Spiros Kalogeropulos, Mahadevan Rajagopalan, Vikram Rao, Yonghong Song, Partha Tirumalai |
| 2004 | Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. | Russ Joseph, Zhigang Hu, Margaret Martonosi |
| 2004 | Stream Register Files with Indexed Access. | Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William J. Dally |
| 2004 | Exploring Wakeup-Free Instruction Scheduling. | Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2004 | Program Counter Based Techniques for Dynamic Power Management. | Chris Gniady, Y. Charlie Hu, Yung-Hsiang Lu |
| 2004 | Reducing Branch Misprediction Penalty via Selective Branch Recovery. | Amit Gandhi, Haitham Akkary, Srikanth T. Srinivasan |
| 2004 | Link-Time Path-Sensitive Memory Redundancy Elimination. | Manel Fernndez, Roger Espasa |
| 2004 | A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors. | Ayose Falcn, Alex Ramrez, Mateo Valero |
| 2004 | Reducing the Scheduling Critical Cycle Using Wakeup Prediction. | Todd E. Ehrhart, Sanjay J. Patel |
| 2004 | Out-of-Order Commit Processors. | Adrin Cristal, Daniel Ortega, Josep Llosa, Mateo Valero |
| 2004 | Accurate and Complexity-Effective Spatial Pattern Prediction. | Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas Moshovos |
| 2004 | Improving Disk Throughput in Data-Intensive Servers. | Enrique V. Carrera, Ricardo Bianchini |
| 2004 | Perceptron-Based Branch Confidence Estimation. | Haitham Akkary, Srikanth T. Srinivasan, Rajendar Koltur, Yogesh Patil, Wael Refaai |
| 2004 | Low-Complexity Distributed Issue Queue. | Jaume Abella, Antonio Gonzlez |
| 2004 | Hardware Support for Prescient Instruction Prefetch. | Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen |