| 2003 | A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores. | Venkata Syam P. Rapaka, Diana Marculescu |
| 2003 | Analysis of discharge techniques for multiple battery systems. | Ravishankar Rao, Sarma B. K. Vrudhula, Daler N. Rakhmatov |
| 2003 | Statistical estimation of leakage current considering inter- and intra-die process variation. | Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester |
| 2003 | Efficient techniques for gate leakage estimation. | Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown |
| 2003 | Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise. | Michael D. Powell, T. N. Vijaykumar |
| 2003 | Analyzing the energy consumption of security protocols. | Nachiketh R. Potlapally, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha |
| 2003 | Power efficient comparators for long arguments in superscalar processors. | Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose |
| 2003 | A 0.123 mW 7.25 GHz static frequency divider by 8 in a 120-nm SOI technology. | Jean-Olivier Plouchart, Jonghae Kim, Hector Recoules, Noah Zamdmer, Yue Tan, Melanie Sherony, Asit Ray, Lawrence F. Wagner |
| 2003 | Energy efficiency and fairness tradeoffs in multi-resource, multi-tasking embedded systems. | Sung I. Park, Vijay Raghunathan, Mani B. Srivastava |
| 2003 | A clock delayed sleep mode domino logic for wide dynamic OR gate. | Kwang-Il Oh, Lee-Sup Kim |
| 2003 | Reducing data cache energy consumption via cached load/store queue. | Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau |
| 2003 | Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization. | David Nguyen, Abhijit Davare, Michael Orshansky, David G. Chinnery, Brandon Thompson, Kurt Keutzer |
| 2003 | Optimal body bias selection for leakage improvement and process compensation over different technology generations. | Cassondra Neau, Kaushik Roy |
| 2003 | Microprocessor pipeline energy analysis. | Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger |
| 2003 | Modeling and estimation of total leakage current in nano-scaled CMOS devices considering the effect of parameter variation. | Saibal Mukhopadhyay, Kaushik Roy |
| 2003 | Checkpointing alternatives for high performance, power-aware processors. | Andreas Moshovos |
| 2003 | Non redundant data cache. | Carlos Molina, Carles Aliagas, Montse Garcia, Antonio Gonzlez, Jordi Tubella |
| 2003 | Electric-energy generation using variable-capacitive resonator for power-free LSI: efficiency analysis and fundamental experiment. | Masayuki Miyazaki, Hidetoshi Tanaka, Goichi Ono, Tomohiro Nagano, Norio Ohkubo, Takayuki Kawahara, Kazuo Yano |
| 2003 | Multivoltage scheduling with voltage-partitioned variable storage. | Amitabh Menon, S. K. Nandy, Mahesh Mehendale |
| 2003 | Reducing energy and delay using efficient victim caches. | Gokhan Memik, Glenn Reinman, William H. Mangione-Smith |
| 2003 | Evolution of low power electronics and its future applications. | Tsugio Makimoto, Yoshio Sakai |
| 2003 | A low-power design methodology for high-resolution pipelined analog-to-digital converters. | Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei |
| 2003 | Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving. | Tao Li, Lizy Kurian John |
| 2003 | Microarchitecture level power and thermal simulation considering temperature dependent leakage model. | Weiping Liao, Fei Li, Lei He |
| 2003 | A low-power VLSI architecture for turbo decoding. | Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer |