| 2000 | A micro-power mixed signal IC for battery-operated burglar alarm systems. | Silvio Bolliri, Paolo Porcu, Luigi Raffo |
| 2000 | A recursive algorithm for low-power memory partitioning. | Luca Benini, Alberto Macii, Massimo Poncino |
| 2000 | Practical considerations of clock-powered logic. | William C. Athas |
| 2000 | High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. | Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry |
| 2000 | A spatially-adaptive bus interface for low-switching communication (poster session). | Andrea Acquaviva, Riccardo Scarsi |
| 1999 | Global register allocation for minimizing energy consumption. | Yumin Zhang, Xiaobo Hu, Danny Z. Chen |
| 1999 | Retractile clock-powered logic. | Nestoras Tzartzanis, William C. Athas |
| 1999 | Low power synthesis of dual threshold voltage CMOS VLSI circuits. | Vijay Sundararajan, Keshab K. Parhi |
| 1999 | Ultra-low power digital subthreshold logic circuits. | Hendrawan Soeleman, Kaushik Roy |
| 1999 | Energy-efficient design of battery-powered embedded systems. | Tajana Simunic, Luca Benini, Giovanni De Micheli |
| 1999 | Comparison of class A amplifiers for low-power and low-voltage switched capacitor applications. | Christoph Schwoerer, Dominique Morche, Patrice Senn |
| 1999 | Energy efficient data transfer and storage organization for a MAP turbo decoder module. | Curt Schurgers, Francky Catthoor, Marc Engels |
| 1999 | Passive precharge and rippled power logic (PPRPL). | Samuel B. Schaevitz, Christopher Lin |
| 1999 | CMOS front-end LNA-mixer of micropower RF wireless systems. | Razieh Rofougaran, Tsung-Hsien Lin, William J. Kaiser |
| 1999 | An optimization technique for dual-output domino logic. | Sumant Ramprasad, Ibrahim N. Hajj, Farid N. Najm |
| 1999 | Mixed-swing quadrail for low power dual-rail domino logic. | Bharath Ramasubramanian, Herman Schmit, L. Richard Carley |
| 1999 | Stochastic modeling of a power-managed system: construction and optimization. | Qinru Qiu, Qing Wu, Massoud Pedram |
| 1999 | Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits. | Ruchir Puri, Ching-Te Chuang |
| 1999 | An architectural solution for the inductive noise problem due to clock-gating. | Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari |
| 1999 | Clock distribution using multiple voltages. | Jatuchai Pangjun, Sachin S. Sapatnekar |
| 1999 | Algorithm and architecture of a 1V low power hearing instrument DSP. | Finn Mller, Nikolai Bisgaard, John Melanson |
| 1999 | A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells. | Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka |
| 1999 | Vibration-to-electric energy conversion. | Scott E. Meninger, Jos Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang |
| 1999 | A 1.2V, 430MHz, 4dBm power amplifier and a 250muW front-end, using a standard digital CMOS process. | Thierry Melly, Alain-Serge Porret, Christian C. Enz, Maher Kayal, Eric A. Vittoz |
| 1999 | Inverse polarity techniques for high-speed/low-power multipliers. | Pascal C. H. Meier, Rob A. Rutenbar, L. Richard Carley |