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IEEE International Symposium on Performance Analysis of Systems and Software

ISPASS

B

CORE rank

CORE rank (raw)

B

Fields of research

Software Engineering

Papers indexed

891

2000–2026

Papers per year

200065 peak2026

ISPASS papers

891 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2013Characterizing the microarchitectural side effects of operating system calls.Addison Mayberry, Matthew Laquidara, Charles C. Weems
2013Performance analysis of broadcasting algorithms on the Intel Single-Chip Cloud Computer.John Matienzo, Natalie D. Enright Jerger
2013How a single chip causes massive power bills GPUSimPow: A GPGPU power simulator.Jan Lucas, Sohan Lal, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink
2013Synergistic coupling of SSD and hard disk for QoS-aware virtual memory.Ke Liu, Xuechen Zhang, Kei Davis, Song Jiang
2013Pinpointing data locality bottlenecks with low overhead.Xu Liu, John M. Mellor-Crummey
2013Parallel GPU architecture simulation framework exploiting work allocation unit parallelism.Sangpil Lee, Won Woo Ro
2013Evaluating STT-RAM as an energy-efficient main memory alternative.Emre Kultursay, Mahmut T. Kandemir, Anand Sivasubramaniam, Onur Mutlu
2013Advancing computer systems without technology progress.Christos Kozyrakis
2013A detailed and flexible cycle-accurate Network-on-Chip simulator.Nan Jiang, Daniel U. Becker, George Michelogiannakis, James D. Balfour, Brian Towles, David E. Shaw, John Kim, William J. Dally
2013Evaluating cache coherent shared virtual memory for heterogeneous multicore chips.Blake A. Hechtman, Daniel J. Sorin
2013An analytical framework for estimating TCO and exploring data center design space.Damien Hardy, Marios Kleanthous, Isidoros Sideris, Ali G. Saidi, Emre Ozer, Yiannakis Sazeides
2013Power measurement techniques on standard compute nodes: A quantitative comparison.Daniel Hackenberg, Thomas Ilsche, Robert Schne, Daniel Molka, Maik Schmidt, Wolfgang E. Nagel
2013Energy efficiency of lossless data compression on a mobile device: An experimental evaluation.Armen Dzhagaryan, Aleksandar Milenkovic, Martin Burtscher
2013A circuit-architecture co-optimization framework for evaluating emerging memory hierarchies.Xiangyu Dong, Norman P. Jouppi, Yuan Xie
2013Characterizing scalar opportunities in GPGPU applications.Zhongliang Chen, David R. Kaeli, Norman Rubin
2013Sampled simulation of multi-threaded applications.Trevor E. Carlson, Wim Heirman, Lieven Eeckhout
2013Virtual Power Management simulation framework for computer systems.Bishop Brock, Srinivasan Ramani, Ken Vu, Heather Hanson, Michael S. Floyd
2013Use of simple analytic performance models for streaming data applications deployed on diverse architectures.Jonathan C. Beard, Roger D. Chamberlain
2013Exascale workload characterization and architecture implications.Prasanna Balaprakash, Darius Buntinas, Anthony Chan, Apala Guha, Rinku Gupta, Sri Hari Krishna Narayanan, Andrew A. Chien, Paul D. Hovland, Boyana Norris
2013McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling.Jung Ho Ahn, Sheng Li, Seongil O, Norman P. Jouppi
2012A single-pass cache simulation methodology for two-level unified caches.Wei Zang, Ann Gordon-Ross
2012Understanding the communication characteristics in HBase: What are the fundamental bottlenecks?Md. Wasi-ur-Rahman, Jian Huang, Jithin Jose, Xiangyong Ouyang, Hao Wang, Nusrat S. Islam, Hari Subramoni, Chet Murthy, Dhabaleswar K. Panda
2012A cycle-level SIMT-GPU simulation framework.Po-Han Wang, Chien-Wei Lo, Chia-Lin Yang, Yu-Jung Cheng
2012Performance analysis of thread mappings with a holistic view of the hardware resources.Wei Wang, Tanima Dey, Jason Mars, Lingjia Tang, Jack W. Davidson, Mary Lou Soffa
2012Comparing the power and performance of Intel's SCC to state-of-the-art CPUs and GPUs.Ehsan Totoni, Babak Behzad, Swapnil Ghike, Josep Torrellas
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