International Symposium on Microarchitecture
MICRO
A*
CORE rank
CORE rank (raw)
A*
Acceptance rate
21.0% (2023)
Fields of research
Computer Systems Engineering
Papers indexed
2,401
1972–2025
Papers per year
1972123 peak2025
Most published authors
MICRO papers
2,401 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2018 | Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism. | Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel S. Emer, Daniel Snchez |
| 2018 | RpStacks-MT: A High-Throughput Design Evaluation Methodology for Multi-Core Processors. | Hanhwi Jang, Jae-Eon Jo, Jaewon Lee, Jangwoo Kim |
| 2018 | STRAIGHT: Hazardless Processor Architecture Without Register Renaming. | Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai |
| 2018 | Persistence Parallelism Optimization: A Holistic Approach from Memory Bus to RDMA Network. | Xing Hu, Matheus Ogleari, Jishen Zhao, Shuangchen Li, Abanti Basak, Yuan Xie |
| 2018 | Hierarchical and Dependency-Aware Task Mapping for NoC-based Systems. | Chun-Hsian Huang, Ching-Yen Chen, Hung-Yu Huang |
| 2018 | Keynote Talk: 3D Core-based SoC Testing for Low Power and TSV Count Minimization. | Shih-Hsu Huang |
| 2018 | Multi-dimensional Parallel Training of Winograd Layer on Memory-Centric Architecture. | Byungchul Hong, Yeonju Ro, John Kim |
| 2018 | Attach: Towards Ideal Memory Compression by Mitigating Metadata Bandwidth Overheads. | Seokin Hong, Prashant Jayaprakash Nair, Blent Abali, Alper Buyuktosunoglu, Kyu-Hyoun Kim, Michael B. Healy |
| 2018 | Morph: Flexible Acceleration for 3D CNN-Based Video Understanding. | Kartik Hegde, Rohit Agrawal, Yulun Yao, Christopher W. Fletcher |
| 2018 | Leveraging CPU Electromagnetic Emanations for Voltage Noise Characterization. | Zacharias Hadjilambrou, Shidhartha Das, Marco A. Antoniades, Yiannakis Sazeides |
| 2018 | Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources. | Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung |
| 2018 | MDACache: Caching for Multi-Dimensional-Access Memories. | Sumitha George, Minli Julie Liao, Huaipan Jiang, Jagadish B. Kotra, Mahmut T. Kandemir, Jack Sampson, Vijaykrishnan Narayanan |
| 2018 | Magic-State Functional Units: Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures. | Yongshan Ding, Adam Holmes, Ali Javadi-Abhari, Diana Franklin, Margaret Martonosi, Frederic T. Chong |
| 2018 | EMPROF: Memory Profiling Via EM-Emanation in IoT and Hand-Held Devices. | Moumita Dey, Alireza Nazari, Alenka G. Zajic, Milos Prvulovic |
| 2018 | Codesign of energy and resource efficient contention-free Network-on Chip for real-time embedded systems. | Stanislaw Deniziak, Robert Tomaszewski |
| 2018 | PermDNN: Efficient Compressed DNN Architecture with Permuted Diagonal Matrices. | Chunhua Deng, Siyu Liao, Yi Xie, Keshab K. Parhi, Xuehai Qian, Bo Yuan |
| 2018 | Compresso: Pragmatic Main Memory Compression. | Esha Choukse, Mattan Erez, Alaa R. Alameldeen |
| 2018 | Taming the Killer Microsecond. | Shenghsun Cho, Amoghavarsha Suresh, Tapti Palit, Michael Ferdman, Nima Honarmand |
| 2018 | Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories. | Wonil Choi, Myoungsoo Jung, Mahmut T. Kandemir |
| 2018 | NN-Noxim: High-Level Cycle-Accurate NoC-based Neural Networks Simulator. | Kun-Chih Jimmy Chen, Ting-Yi Wang |
| 2018 | An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware. | Tao Chen, Shreesha Srinath, Christopher Batten, G. Edward Suh |
| 2018 | MAVBench: Micro Aerial Vehicle Benchmarking. | Behzad Boroujerdian, Hasan Genc, Srivatsan Krishnan, Wenzhi Cui, Aleksandra Faust, Vijay Janapa Reddi |
| 2018 | Scalable Distributed Last-Level TLBs Using Low-Latency Interconnects. | Srikant Bharadwaj, Guilherme Cox, Tushar Krishna, Abhishek Bhattacharjee |
| 2018 | 3D MAX: A Maximally Adaptive Routing Method for VC-less 3D Mesh-based Networks-on-Chip. | Poona Bahrebar, Dirk Stroobandt |
| 2018 | ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata. | Kevin Angstadt, Arun Subramaniyan, Elaheh Sadredini, Reza Rahimi, Kevin Skadron, Westley Weimer, Reetuparna Das |
776–800 of 2,401← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing