International Symposium on Microarchitecture
MICRO
A*
CORE rank
CORE rank (raw)
A*
Acceptance rate
21.0% (2023)
Fields of research
Computer Systems Engineering
Papers indexed
2,401
1972–2025
Papers per year
1972123 peak2025
Most published authors
MICRO papers
2,401 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2018 | Performance Improvement by Prioritizing the Issue of the Instructions in Unconfident Branch Slices. | Hideki Ando |
| 2018 | Application-Transparent Near-Memory Processing Architecture with Memory Channel Network. | Mohammad Alian, Seungwon Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam J. McPadden, Oliver O'Halloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-Mei W. Hwu, Nam Sung Kim |
| 2018 | Architectural Support for Probabilistic Branches. | Almutaz Adileh, David J. Lilja, Lieven Eeckhout |
| 2018 | Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories. | Behzad Salami, Osman S. Unsal, Adrin Cristal Kestelman |
| 2017 | Versapipe: a versatile programming framework for pipelined computing on GPU. | Zhen Zheng, Chanyoung Oh, Jidong Zhai, Xipeng Shen, Youngmin Yi, Wenguang Chen |
| 2017 | Race-to-sleep + content caching + display caching: a recipe for energy-efficient video streaming on handhelds. | Haibo Zhang, Prasanna Venkatesh Rengasamy, Shulin Zhao, Nachiappan Chidambaram Nachiappan, Anand Sivasubramaniam, Mahmut T. Kandemir, Ravi R. Iyer, Chita R. Das |
| 2017 | Banshee: bandwidth-efficient DRAM caching via software/hardware cooperation. | Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas |
| 2017 | UNFOLD: a memory-efficient speech recognizer using on-the-fly WFST composition. | Reza Yazdani, Jos-Mara Arnau, Antonio Gonzlez |
| 2017 | Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs. | An-Yeu Andy Wu, Kun-Chih Jimmy Chen, Chih-Hao Chao |
| 2017 | Hardware supported persistent object address translation. | Tiancong Wang, Sakthikumaran Sambasivam, Yan Solihin, James Tuck |
| 2017 | Taming the instruction bandwidth of quantum computers via hardware-managed error correction. | Swamit S. Tannu, Zachary A. Myers, Prashant J. Nair, Douglas M. Carmean, Moinuddin K. Qureshi |
| 2017 | Data movement aware computation partitioning. | Xulong Tang, Orhan Kislal, Mahmut T. Kandemir, Mustafa Karaky |
| 2017 | Efficient exception handling support for GPUs. | Ivan Tanasic, Isaac Gelado, Marc Jord, Eduard Ayguad, Nacho Navarro |
| 2017 | Contutto: a novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor. | Bharat Sukhwani, Thomas Roewer, Charles L. Haymes, Kyu-Hyoun Kim, Adam J. McPadden, Daniel M. Dreps, Dean Sanner, Jan van Lunteren, Sameh W. Asaad |
| 2017 | Pageforge: a near-memory content-aware page-merging architecture. | Dimitrios Skarlatos, Nam Sung Kim, Josep Torrellas |
| 2017 | Proteus: a flexible and fast software supported hardware logging approach for NVM. | Seunghee Shin, Satish Kumar Tirukkovalluri, James Tuck, Yan Solihin |
| 2017 | Load value prediction via path-based address prediction: avoiding mispredictions due to conflicting stores. | Rami Sheikh, Harold W. Cain, Raguram Damodaran |
| 2017 | Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology. | Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie S. Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry |
| 2017 | Pipelining a triggered processing element. | Thomas J. Repetti, Joo Pedro Cerqueira, Martha A. Kim, Mingoo Seok |
| 2017 | Improving Scalability in Thermally Resilient Hybrid Photonic-Electronic NoCs. | Keyvan Ramezanpour, Xingye Liu, Paul Ampadu |
| 2017 | PARSNIP: performant architecture for race safety with no impact on precision. | Yuanfeng Peng, Benjamin P. Wood, Joseph Devietti |
| 2017 | Scale-out acceleration for machine learning. | Jongse Park, Hardik Sharma, Divya Mahajan, Joon Kyung Kim, Preston Olds, Hadi Esmaeilzadeh |
| 2017 | Lightweight Emulation of Virtual Channels using Swaps. | Mayank Parasar, Tushar Krishna |
| 2017 | Harnessing voltage margins for energy efficiency in multicore CPUs. | George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Peter Lawthers, Shidhartha Das |
| 2017 | Mirage cores: the illusion of many out-of-order cores using in-order hardware. | Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, Scott A. Mahlke |
801–825 of 2,401← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing