| 2013 | Millimeter (mm)-wave wireless NoC as interconnection backbone for multicore chips: promises and challenges. | Partha Pratim Pande |
| 2013 | Trace based phase prediction for tightly-coupled heterogeneous cores. | Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, Scott A. Mahlke |
| 2013 | Design space exploration for streaming applications on multiprocessors with guaranteed service NoC. | Usman Mazhar Mirza, Flavius Gruian, Krzysztof Kuchcinski |
| 2013 | Enabling datacenter servers to scale out economically and sustainably. | Chao Li, Yang Hu, Ruijin Zhou, Ming Liu, Longjun Liu, Jingling Yuan, Tao Li |
| 2013 | Towards optimal adaptive routing in 3D NoC with limited vertical bandwidth. | Gunhee Lee, Jinho Lee, Kiyoung Choi |
| 2013 | MLP-aware dynamic instruction window resizing for adaptively exploiting both ILP and MLP. | Yuya Kora, Kyohei Yamaguchi, Hideki Ando |
| 2013 | RDIP: return-address-stack directed instruction prefetching. | Aasheesh Kolli, Ali G. Saidi, Thomas F. Wenisch |
| 2013 | Meet the walkers: accelerating index traversals for in-memory databases. | Yusuf Onur Koberber, Boris Grot, Javier Picorel, Babak Falsafi, Kevin T. Lim, Parthasarathy Ranganathan |
| 2013 | Use it or lose it: wear-out and lifetime in future chip multiprocessors. | Hyungjun Kim, Arseniy Vitkovskiy, Paul V. Gratz, Vassos Soteriou |
| 2013 | SHIFT: shared history instruction fetch for lean-core server processors. | Cansu Kaynak, Boris Grot, Babak Falsafi |
| 2013 | Insertion and promotion for tree-based PseudoLRU last-level caches. | Daniel A. Jimnez |
| 2013 | Linearizing irregular memory accesses for improved correlated prefetching. | Akanksha Jain, Calvin Lin |
| 2013 | Modeling and analyzing timing faults in transaction level SystemC programs. | Reza Hajisheykhi, Ali Ebnenasir, Sandeep S. Kulkarni |
| 2013 | Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency. | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte |
| 2013 | Efficient management of last-level caches in graphics processors for 3D scene rendering workloads. | Jayesh Gaur, Raghuram Srinivasan, Sreenivas Subramoney, Mainak Chaudhuri |
| 2013 | Energy efficient GPU transactional memory via space-time optimizations. | Wilson W. L. Fung, Tor M. Aamodt |
| 2013 | Aegis: partitioning data block for efficient recovery of stuck-at-faults in phase change memory. | Jie Fan, Song Jiang, Jiwu Shu, Youhui Zhang, Weimin Zhen |
| 2013 | Costs and benefits of flexibility in spatial division circuit switched networks-on-chip. | Ahsen Ejaz, Axel Jantsch |
| 2013 | On heterogeneous network-on-chip design based on constraint programming. | Ayhan Demiriz, Nader Bagherzadeh |
| 2013 | Efficient multiprogramming for multicores with SCAF. | Timothy Creech, Aparna Kotha, Rajeev Barua |
| 2013 | A first effort for a distributed segment-based approach on self-assembled nano networks. | Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti |
| 2013 | DESC: energy-efficient data exchange using synchronized counters. | Mahdi Nazm Bojnordi, Engin Ipek |
| 2013 | Large-reach memory management unit caches. | Abhishek Bhattacharjee |
| 2013 | Empirical and theoretical lower bounds on energy consumption for networks on chip. | George B. P. Bezerra, Dorian C. Arnold, Stephanie Forrest |
| 2013 | Virtually-aged sampling DMR: unifying circuit failure prediction and circuit failure detection. | Raghuraman Balasubramanian, Karthikeyan Sankaralingam |