| 2013 | The reuse cache: downsizing the shared last-level cache. | Jorge Albericio, Pablo Ibez, Vctor Vials, Jos M. Llabera |
| 2013 | Warped gates: gating aware scheduling and power gating for GPGPUs. | Mohammad Abdel-Majeed, Daniel Wong, Murali Annavaram |
| 2012 | Security verification of hardware-enabled attestation protocols. | Tianwei Zhang, Jakub Szefer, Ruby B. Lee |
| 2012 | Developing survival instincts in computing systems. | Alex Yakovlev |
| 2012 | A high-efficiency low-cost heterogeneous 3D network-on-chip design. | Thomas Canhao Xu, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
| 2012 | Inferred Models for Dynamic and Sparse Hardware-Software Spaces. | Weidan Wu, Benjamin C. Lee |
| 2012 | Kernel Weaver: Automatically Fusing Database Primitives for Efficient GPU Computation. | Haicheng Wu, Gregory Frederick Diamos, Srihari Cadambi, Sudhakar Yalamanchili |
| 2012 | An 8-bit AVR-Based Elliptic Curve Cryptographic RISC Processor for the Internet of Things. | Erich Wenger, Johann Groschdl |
| 2012 | SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations. | Cheng Wang, Youfeng Wu, Hongbo Rong, Hyunchul Park |
| 2012 | A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. | Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi |
| 2012 | Control-Flow Decoupling. | Rami Sheikh, James Tuck, Eric Rotenberg |
| 2012 | Addressing End-to-End Memory Access Latency in NoC-Based Multicores. | Akbar Sharifi, Emre Kultursay, Mahmut T. Kandemir, Chita R. Das |
| 2012 | Cache-Conscious Wavefront Scheduling. | Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt |
| 2012 | Power efficiency of wavelength-routed optical NoC topologies for global connectivity of 3D multi-core processors. | Luca Ramini, Davide Bertozzi |
| 2012 | Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem. | Petar Radojkovic, Paul M. Carpenter, Miquel Moret, Alex Ramrez, Francisco J. Cazorla |
| 2012 | Fundamental Latency Trade-off in Architecting DRAM Caches: Outperforming Impractical SRAM-Tags with a Simple and Practical Design. | Moinuddin K. Qureshi, Gabriel H. Loh |
| 2012 | NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures. | Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides |
| 2012 | CoLT: Coalesced Large-Reach TLBs. | Binh Pham, Viswanathan Vaidyanathan, Aamer Jaleel, Abhishek Bhattacharjee |
| 2012 | Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability. | Yongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott A. Mahlke |
| 2012 | Position-based weighted round-robin arbitration for equality of service in many-core network-on-chips. | Hanmin Park, Kiyoung Choi |
| 2012 | Vulcan: Hardware Support for Detecting Sequential Consistency Violations Dynamically. | Abdullah Muzahid, Shanxiang Qi, Josep Torrellas |
| 2012 | Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. | Randy Morris, Avinash Karanth Kodi, Ahmed Louri |
| 2012 | Low power flitwise routing in an unidirectional torus with minimal buffering. | Jrg Mische, Theo Ungerer |
| 2012 | Predicting Performance Impact of DVFS for Realistic Memory Systems. | Rustam Miftakhutdinov, Eiman Ebrahimi, Yale N. Patt |
| 2012 | Rethinking DRAM Power Modes for Energy Proportionality. | Krishna T. Malladi, Ian Shaeffer, Liji Gopalakrishnan, David Lo, Benjamin C. Lee, Mark Horowitz |