| 2010 | Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels. | Michael Steffen, Joseph Zambreno |
| 2010 | Evolution of the server processor/platform architecture and the critical role of interconnect and future challenges. | Ganapati Srinivasa |
| 2010 | Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors. | Shekhar Srikantaiah, Mahmut T. Kandemir |
| 2010 | Register Cache System Not for Latency Reduction Purpose. | Ryota Shioya, Kazuo Horio, Masahiro Goshima, Shuichi Sakai |
| 2010 | SAFER: Stuck-At-Fault Error Recovery for Memories. | Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee |
| 2010 | The ZCache: Decoupling Ways and Associativity. | Daniel Snchez, Christos Kozyrakis |
| 2010 | Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling. | Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David M. Brooks |
| 2010 | ScalableBulk: Scalable Cache Coherence for Atomic Blocks in a Lazy Environment. | Xuehai Qian, Wonsun Ahn, Josep Torrellas |
| 2010 | LOFT: A High Performance Network-on-Chip Providing Quality-of-Service Support. | Jin Ouyang, Yuan Xie |
| 2010 | InstantCheck: Checking the Determinism of Parallel Programs Using On-the-Fly Incremental Hashing. | Adrian Nistor, Darko Marinov, Josep Torrellas |
| 2010 | AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors. | Arun A. Nair, Lizy Kurian John, Lieven Eeckhout |
| 2010 | AtomTracker: A Comprehensive Approach to Atomic Region Inference and Violation Detection. | Abdullah Muzahid, Norimasa Otsuki, Josep Torrellas |
| 2010 | Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches. | Timothy N. Miller, Renji Thomas, James Dinan, Bruce M. Adcock, Radu Teodorescu |
| 2010 | Enabling dynamic and programmable QoS in SoCs. | Daniele Mangano, Giovanni Strano |
| 2010 | A Dynamically Adaptable Hardware Transactional Memory. | Marc Lupon, Grigorios Magklis, Antonio Gonzlez |
| 2010 | Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology. | Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Francisco Gilabert Villamn, Mara Engracia Gmez, Davide Bertozzi |
| 2010 | Minimal Multi-threading: Finding and Removing Redundant Instructions in Multi-threaded Processors. | Guoping Long, Diana Franklin, Susmit Biswas, Pablo J. Ortiz, Jason Oberg, Dongrui Fan, Frederic T. Chong |
| 2010 | Many-Thread Aware Prefetching Mechanisms for GPGPU Applications. | Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim, Richard W. Vuduc |
| 2010 | Probabilistic Distance-Based Arbitration: Providing Equality of Service for Many-Core CMPs. | Michael Mihn-Jong Lee, John Kim, Dennis Abts, Michael R. Marty, Jae W. Lee |
| 2010 | Automatic Parallelization in a Binary Rewriter. | Aparna Kotha, Kapil Anand, Matthew Smithson, Greeshma Yellareddy, Rajeev Barua |
| 2010 | Scalable Speculative Parallelization on Commodity Clusters. | Hanjun Kim, Arun Raman, Feng Liu, Jae W. Lee, David I. August |
| 2010 | Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior. | Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter |
| 2010 | SD3: A Scalable Approach to Dynamic Data-Dependence Profiling. | Minjang Kim, Hyesoon Kim, Chi-Keung Luk |
| 2010 | Virtual Snooping: Filtering Snoops in Virtualized Multi-cores. | Daehoon Kim, Hwanju Kim, Jaehyuk Huh |
| 2010 | A framework for designing congestion-aware deterministic routing. | Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu |