| 2010 | Sampling Dead Block Prediction for Last-Level Caches. | Samira Manabi Khan, Yingying Tian, Daniel A. Jimnez |
| 2010 | Thread criticality support in on-chip networks. | Yuho Jin, Ruisheng Wang, Woojin Choi, Timothy Mark Pinkston |
| 2010 | Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies. | Aamer Jaleel, Eric Borch, Malini Bhandaru, Simon C. Steely Jr., Joel S. Emer |
| 2010 | Adaptive Flow Control for Robust Performance and Energy. | Syed Ali Raza Jafri, Yu-Ju Hong, Mithuna Thottethodi, T. N. Vijaykumar |
| 2010 | A variable-pipeline on-chip router optimized to traffic pattern. | Yuto Hirata, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2010 | Netrace: dependency-driven trace-based network-on-chip simulation. | Joel Hestness, Boris Grot, Stephen W. Keckler |
| 2010 | Erasing Core Boundaries for Robust and Configurable Performance. | Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott A. Mahlke |
| 2010 | Combating Aging with the Colt Duty Cycle Equalizer. | Erika Gunadi, Abhishek A. Sinkar, Nam Sung Kim, Mikko H. Lipasti |
| 2010 | A monitoring system for NoCs. | Leandro Fiorin, Gianluca Palermo, Cristina Silvano |
| 2010 | A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip. | Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang |
| 2010 | Task Superscalar: An Out-of-Order Task Pipeline. | Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramrez, Rosa M. Badia, Eduard Ayguad, Jess Labarta, Mateo Valero |
| 2010 | A Predictive Model for Dynamic Microarchitectural Adaptivity Control. | Christophe Dubach, Timothy M. Jones, Edwin V. Bonilla, Michael F. P. O'Boyle |
| 2010 | Flexible and Efficient Instruction-Grained Run-Time Monitoring Using On-Chip Reconfigurable Fabric. | Daniel Y. Deng, Daniel Lo, Greg Malysa, Skyler Schneider, G. Edward Suh |
| 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory. | Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, Martin Pohlack, Michael Hohmuth, David Christie, Dan Grossman |
| 2010 | Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? | Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai |
| 2010 | Memory Latency Reduction via Thread Throttling. | Hsiang-Yun Cheng, Chung-Hsiang Lin, Jian Li, Chia-Lin Yang |
| 2010 | Adaptive and Speculative Slack Simulations of CMPs on CMPs. | Jianwei Chen, Lakshmi Kumar Dabbiru, Daniel Wong, Murali Annavaram, Michel Dubois |
| 2010 | Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories. | Adrian M. Caulfield, Arup De, Joel Coburn, Todor I. Mollow, Rajesh K. Gupta, Steven Swanson |
| 2010 | Efficient Selection of Vector Instructions Using Dynamic Programming. | Rajkishore Barik, Jisheng Zhao, Vivek Sarkar |
| 2010 | Throughput-Effective On-Chip Networks for Manycore Accelerators. | Ali Bakhoda, John Kim, Tor M. Aamodt |
| 2010 | Hardware Support for Relaxed Concurrency Control in Transactional Memory. | Utku Aydonat, Tarek S. Abdelrahman |
| 2010 | Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks. | Minseon Ahn, Eun Jung Kim |
| 2010 | An efficient energy- and bandwidth- aware mapping algorithm for regular NoC architecture. | Saurabh Agrawal, Dhawal Sant, G. K. Sharma |
| 2009 | Variation-tolerant non-uniform 3D cache management in die stacked multicore processor. | Bo Zhao, Yu Du, Youtao Zhang, Jun Yang |
| 2009 | Characterizing and mitigating the impact of process variations on phase change based memory systems. | Wangyuan Zhang, Tao Li |