| 1996 | Speculative Hedge: Regulating Compile-time Speculation Against Profile Variations. | Brian L. Deitrich, Wen-mei W. Hwu |
| 1996 | A Persistent Rescheduled-page Cache for Low Overhead Object Code Compatibility in VLIW Architectures. | Thomas M. Conte, Sumedh W. Sathaye, Sanjeev Banerjia |
| 1996 | Accurate and Practical Profile-driven Compilation Using the Profile Buffer. | Thomas M. Conte, Kishore N. Menezes, Mary Ann Hirsch |
| 1996 | Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings. | Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye |
| 1996 | Hot Cold Optimization of Large Windows/NT Applications. | Robert S. Cohn, P. Geoffrey Lowney |
| 1996 | Profile-driven Instruction Level Parallel Scheduling with Application to Super Blocks. | Chandra Chekuri, Richard Johnson, Rajeev Motwani, B. Natarajan, B. Ramakrishna Rau, Michael S. Schlansker |
| 1996 | Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline. | James O. Bondi, Ashwini K. Nanda, Simonjit Dutta |
| 1996 | Efficient Path Profiling. | Thomas Ball, James R. Larus |
| 1996 | Meld Scheduling: Relaxing Scheduling Constraints Across Region Boundaries. | Santosh G. Abraham, Vinod Kathail, Brian L. Deitrich |
| 1995 | Modulo scheduling with multiple initiation intervals. | Nancy J. Warter-Perez, Noubar Partamian |
| 1995 | Disjoint eager execution: an optimal form of speculative execution. | Augustus K. Uht, Vijay Sindagi, Kelley Hall |
| 1995 | A modified approach to data cache management. | Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun |
| 1995 | Improving CISC instruction decoding performance using a fill unit. | Mark Smotherman, Manoj Franklin |
| 1995 | The role of adaptivity in two-level adaptive branch prediction. | Stuart Sechrest, Chih-Chieh Lee, Trevor N. Mudge |
| 1995 | Critical path reduction for scalar programs. | Michael S. Schlansker, Vinod Kathail |
| 1995 | Design of storage hierarchy in multithreaded architectures. | Lucas Roh, Walid A. Najjar |
| 1995 | Decoupling integer execution in superscalar processors. | Subbarao Palacharla, James E. Smith |
| 1995 | Cache miss heuristics and preloading techniques for general-purpose programs. | Toshihiro Ozawa, Yasunori Kimura, Shin'ichiro Nishizaki |
| 1995 | An experimental study of several cooperative register allocation and instruction scheduling strategies. | Cindy Norris, Lori L. Pollock |
| 1995 | Spill-free parallel scheduling of basic blocks. | B. Natarajan, Michael S. Schlansker |
| 1995 | Dynamic path-based branch correlation. | Ravi Nair |
| 1995 | Exploiting short-lived variables in superscalar processors. | Luis A. Lozano, Guang R. Gao |
| 1995 | Hypernode reduction modulo scheduling. | Josep Llosa, Mateo Valero, Eduard Ayguad, Antonio Gonzlez |
| 1995 | SPAID: software prefetching in pointer- and call-intensive environments. | Mikko H. Lipasti, William J. Schmidt, Steven R. Kunkel, Robert R. Roediger |
| 1995 | Unrolling-based optimizations for modulo scheduling. | Daniel M. Lavery, Wen-mei W. Hwu |