| 1990 | A multiple floating point coprocessor architecture. | Lawrence Rauchwerger, P. Michael Farmwald |
| 1990 | Address compression through base register caching. | Arvin Park, Matthew K. Farrens |
| 1990 | Realistic scheduling: compaction for pipelined architectures. | Alexandru Nicolau, Roni Potasman |
| 1990 | Using a lookahead window in a compaction-based parallelizing compiler. | Toshio Nakatani, Kemal Ebcioglu |
| 1990 | A framework for high-speed controller design. | Johannes M. Mulder, Robert J. Portier, A. Srivastava |
| 1990 | Hardware implementation of a general multi-way jump mechanism. | Soo-Mook Moon, Scott D. Carson, Ashok K. Agrawala |
| 1990 | An application of L systems to local microcode synthesis. | Farhad Mavaddat, M. Mahmood, Mantis H. M. Cheng |
| 1990 | A memory management unit and cache controller for the MARS system. | Feipei Lai, Chyuan-Yow Wu, Tai-Ming Parng |
| 1990 | Optimization on instruction reorganization. | Feipei Lai, Hung-Chang Lee, Chun-Luh Lee |
| 1990 | High-level microprogramming: an optimizing C compiler for a processing element of a CAD accelerator. | Paul Kenyon, Prathima Agrawal, Sharad C. Seth |
| 1990 | Software pipelining: a comparison and improvement. | Reese B. Jones, Vicki H. Allan |
| 1990 | A high-level microprogrammed processor. | Christian Iseli, Eduardo Sanchez |
| 1990 | On the testing of microprogrammed processor. | Suntae Hwang, Rochit Rajsuman, Yashwant K. Malaiya |
| 1990 | A fine-grained MIMD architecture based upon register channels. | Rajiv Gupta |
| 1990 | PRISM architecture: parallel and pipeline features. | Beverly Gocal |
| 1990 | An evaluation system for application specific architectures. | Alessandro De Gloria, Paolo Faraboschi |
| 1990 | Instruction sets and their implementations. | Michael J. Flynn |
| 1990 | An evaluation of functional unit lengths for single-chip processors. | Matthew K. Farrens, Andrew R. Pleszkun |
| 1990 | A survey on bit dimension optimization strategies of microprograms. | Sunil R. Das, Amiya Nayak |
| 1990 | VLIW-in-the-large: a model for fine grain parallelism exploitation on distributed memory multiprocessors. | Marco Danelutto, Marco Vanneschi |
| 1990 | A weighted technique for programmable logic devices minimization. | C. Hwa Chang, Hammad K. Azzam |
| 1990 | Topologies for the parallel backtracking Prolog engine. | Leonardo Campanale, Mario De Blasi, Anna Gentile, F. Greco |
| 1990 | Interconnection synthesis with geometric constraints. | Forrest Brewer, Barry M. Pangrle, Andrew Seawright |
| 1990 | Automatic synthesis of a dual-PLA controller with a counter. | David Binger, David Knapp |
| 1990 | Motivation and framework for using genetic algorithms for microcode compaction. | Steven J. Beaty, L. Darrell Whitley, Gearold Johnson |