| 2015 | Can You Trust Your Memory Trace? A Comparison of Memory Traces from Binary Instrumentation and Simulation. | Siddharth Nilakantan, Scott Lerner, Mark Hempstead, Baris Taskin |
| 2015 | Statistical Analysis of 64Mb SRAM for Optimizing Yield and Write Performance. | Gaurav Narang, Pragya Sharma, Mansi Jain, Anuj Grover |
| 2015 | DFT Technique for Quick Characterization of Flash Offset in Pipeline ADCs. | Pradeep Nair, Nagarajan Viswanathan |
| 2015 | Geometric Programming Formulation for Gate Sizing with Pipelining Constraints. | Srinath R. Naidu |
| 2015 | A Novel CKE-ODT-CSN Encoding Scheme in DDR Memory Interface. | Vinod Inipodu Murugan, Narayanan Mayandi, Arul Sendhil |
| 2015 | Design of High Speed Ternary Full Adder and Three-Input XOR Circuits Using CNTFETs. | Sneh Lata Murotiya, Anu Gupta |
| 2015 | Tutorial T7: Physically Unclonable Function: A Promising Security Primitive for Internet of Things. | Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, Phuong Ha Nguyen, Durga Prasad Sahoo |
| 2015 | Accurate Constant Transconductance Generation without Off-Chip Components. | Imon Mondal, Nagendra Krishnapura |
| 2015 | A Flexible Scalable Hardware Architecture for Radial Basis Function Neural Networks. | Mahnaz Mohammadi, Nitin Satpute, Rohit Ronge, Jayesh R. Chandiramani, S. K. Nandy, Aamir Raihan, Tanmay Verma, Ranjani Narayan, Sukumar Bhattacharya |
| 2015 | Optimized Logarithmic Barrel Shifter in Reversible Logic Synthesis. | Sajib Kumar Mitra, Ahsan Raja Chowdhury |
| 2015 | Tutorial T2: Validation and Debug of Security and Trust Issues in Embedded Systems. | Prabhat Mishra, Swarup Bhunia, Srivaths Ravi |
| 2015 | Optimal Test Scheduling of Stacked Circuits under Various Hardware and Power Constraints. | Spencer K. Millican, Kewal K. Saluja |
| 2015 | Comparison of Off-Chip Training Methods for Neuromemristive Systems. | Cory E. Merkel, Dhireesha Kudithipudi |
| 2015 | Micro-architectural Enhancements in Distributed Memory CGRAs for LU and QR Factorizations. | Farhad Merchant, Arka Maity, Mahesh Mahadurkar, Kapil Vatwani, Ishan Munje, Madhava Krishna, Nalesh Sivanandan, Nandhini Gopalan, Soumyendu Raha, S. K. Nandy, Ranjani Narayan |
| 2015 | Low-Area and Low-Power Reconfigurable Architecture for Convolution-Based 1-D DWT Using 9/7 and 5/3 Filters. | Pramod Kumar Meher, Basant Kumar Mohanty, M. N. S. Swamy |
| 2015 | Implementation of NOR Logic Based on Material Implication on CMOL FPGA Architecture. | Pravin Mane, Nishil Talati, Ameya Riswadkar, Bhavan Jasani, C. K. Ramesha |
| 2015 | Way Halted Prediction Cache: An Energy Efficient Cache Architecture for Embedded Processors. | Neethu Bal Mallya, Geeta Patil, Biju K. Raveendran |
| 2015 | A Design Approach for Compressor Based Approximate Multipliers. | Naman Maheshwari, Zhixi Yang, Jie Han, Fabrizio Lombardi |
| 2015 | Hardware Solution for Real-Time Face Recognition. | Gopinath Mahale, Hamsika Mahale, Arnav Goel, S. K. Nandy, S. Bhattacharya, Ranjani Narayan |
| 2015 | Design of a Compact Reversible Carry Look-Ahead Adder Using Dynamic Programming. | Nusrat Jahan Lisa, Hafiz Md. Hasan Babu |
| 2015 | Using Boolean Tests to Improve Detection of Transistor Stuck-Open Faults in CMOS Digital Logic Circuits. | Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski |
| 2015 | Evaluating a Hardware-Based Approach for Detecting Resistive-Open Defects in SRAMs. | Felipe Lavratti, Letcia Maria Bolzani Poehls, Fabian Vargas, Andrea Calimera, Enrico Macii |
| 2015 | A Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic. | S. Dinesh Kumar, Sk. Noor Mahammad |
| 2015 | A Frequency Scan Scheme for PLL-Based Locking to High-Q MEMS Resonators. | Anjan Kumar, Abhinav Dikshit, Bill Clark, Jeff Yan |
| 2015 | Towards a Real-Time Campus-Scale Water Balance Monitoring System. | Vignesh D. Kudva, Prashanth Nayak, Alok Rawat, Anjana G. Ry, K. R. Sheetal Kumar, Bharadwaj Amrutur, Mohan Kumar M. Sy |