| 2004 | An Area-Efficient Pipelined Array Architecture for Euclidean Distance Transformation and Its FPGA Implementation. | N. Sudha |
| 2004 | An ASIC Implementation of Kohonen's Map Based Color Image Compression. | N. Sudha |
| 2004 | A Bus Encoding Technique for Power and Cross-talk Minimization. | P. Subrahmanya, R. Manimegalai, V. Kamakoti, Madhu Mutyam |
| 2004 | Screening of Hot Electron Effect During Plasma Processing. | P. Srinivasan, B. Vootukuru, Durga Misra |
| 2004 | An ILP Formulation for System Level Throughput and Power Optimization in Multiprocessor SoC Architectures. | Krishnan Srinivasan, Karam S. Chatha |
| 2004 | Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment. | H. C. Srinivasaiah, Navakanta Bhat |
| 2004 | Building Giga-Transistor [Enterprise] Microprocessors. | Raman Srinivas |
| 2004 | System-on-Chip (SoC): Clocking and Synchronization Issues. | Ramalingam Sridhar |
| 2004 | Energy Profiler for Hardware/Software Co-Design. | Raghukiran Sreeramaneni, Sarma B. K. Vrudhula |
| 2004 | A Current Sensor for On-Chip, Non-Intrusive Testing of RF Systems. | Antonija Soldo, Anand Gopalan, P. R. Mukund, Martin Margala |
| 2004 | Instruction-Based Delay Fault Self-Testing of Processor Cores. | Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara |
| 2004 | VLSI Architecture of Centroid Tracking Algorithms for Video Tracker. | Manvendra Singh, B. S. Chauhan, N. K. Sharma |
| 2004 | Designing Reconfigurable Systems in Lava. | Satnam Singh |
| 2004 | Improved Approach for Noise Propagation to Identify Functional Noise Violations. | Sachin Shrivastava, Dhanoop Varghese, Vikas Narang, N. V. Arvind |
| 2004 | Inclusion of Thermal Effects in the Simulation of Bipolar Circuits using Circuit Level Behavioral Modeling. | Tushar S. Shelar, G. S. Visweswaran |
| 2004 | Application Specific Instruction Set Processors: Redefining Hardware-Software Boundary. | Chandra Shekhar, Raj Singh, A. S. Mandal, S. C. Bose, Ravi Saini, Pramod Tanwar |
| 2004 | A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation. | Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar |
| 2004 | Design of Power Amplifiers at 2.4 GHz/900 MHz and Implementation of On-chip Linearization Technique in 0.18/0.25m CMOS. | Padmanava Sen, Vipul Garg, Ramesh Garg, Nirmal B. Chakrabarti |
| 2004 | Configurable Platforms With Dynamic Platform Management: An Efficient Alternative to Application-Specific System-on-Chips. | Krishna Sekar, Kanishka Lahiri, Sujit Dey |
| 2004 | Error Correction In Pipelined ADCS Using Arbitrary Radix Calibration. | Anup Savla, Jennifer Leonard, Arun Ravindran |
| 2004 | Low Power Combinational Circuit Synthesis targeting Multiplexer based FPGAs. | D. Satyanarayana, Santanu Chattopadhyay, Jakki Sasidhar |
| 2004 | High-Performance Power Grids For Nanometer Technologies. | Sachin S. Sapatnekar |
| 2004 | An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators. | Hao San, Haruo Kobayashi, Shinya Kawakami, Nobuyuki Kuroiwa |
| 2004 | Quantitative Model for Thermal Behaviour of an Analog Integrated Circuit. | Gagandeep S. Sandha, Pawan K. Singh, C. Pradeep Kumar, D. Nagchoudhuri |
| 2004 | Synthesis of Low Power High Performance Dual-VT PTL Circuits. | Debasis Samanta, Ajit Pal |