An efficient automatic test generation system for path delay faults in combinational circuits.
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal
Browse the full VLSID paper archive.
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal
Browse the full VLSID paper archive.