A 0.5-4GHz Programmable-Bandwidth Fractional-N PLL for Multi-protocol SERDES in 28nm CMOS.
Jayesh Wadekar, Biman Chattopadhyay, Ravi Mehta, Gopalkrishna Nayak
Browse the full VLSID paper archive.
Jayesh Wadekar, Biman Chattopadhyay, Ravi Mehta, Gopalkrishna Nayak
Browse the full VLSID paper archive.