A built-in self-test scheme for the post-bond test of TSVs in 3D ICs.
Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
Browse the full VTS paper archive.
Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
Browse the full VTS paper archive.