| 2026 | ETS | Reliability, Test, and Security of Compute-In-Memories. | Soyed Tuhin Ahmed, Krishnendu Chakrabarty, Jin-Fu Li, Mottaqiallah Taouil, Fouwad Jamil Mir, Said Hamdioui, Mehdi B. Tahoori, Martin Keim, Jongsin Yun |
| 2026 | ETS | Exploration of Reference Trimming Schemes for STT-MRAMs. | Pei-Yun Lin, Jin-Fu Li |
| 2026 | VTS | An Effective Built-In Self-Test Scheme for Digital Computing-In Memories with MAC Function. | Wen-Ching Liao, Kai-Hsiang Chang, Jin-Fu Li |
| 2026 | VTS | Efficient Trimming Test Approach for STT-MRAMs with Merged Reference Scheme. | Pei-Yun Lin, Jin-Fu Li |
| 2025 | ETS | Local Trimming Method for Enhancing the Read Reliability of STT-MRAMs. | Pei-Yun Lin, Jin-Fu Li |
| 2024 | ETS | Parallel-Check Trimming Test Approach for Selecting the Reference Resistance of STT-MRAMs. | Pei-Yun Lin, Jin-Fu Li |
| 2024 | ITC | Efficient Built-In Self-Test Scheme for Inter-Die Interconnects of Chiplet-Based Chips. | Yi-Chun Huang, Pei-Yun Lin, Jin-Fu Li, Hong-Siang Fu, Yung-Ping Lee |
| 2023 | ASPDAC | An On-Line Aging Detection and Tolerance Framework for Improving Reliability of STT-MRAMs. | Yu-Guang Chen, Po-Yeh Huang, Jin-Fu Li |
| 2022 | ITC | DFT-Enhanced Test Scheme for Spin-Transfer-Torque (STT) MRAMs. | Ze-Wei Pan, Jin-Fu Li |
| 2019 | ASPDAC | Testing stuck-open faults of priority address encoder in content addressable memories. | Tsai-Ling Tsai, Jin-Fu Li, Chun-Lung Hsu, Chi-Tien Sun |
| 2018 | ASPDAC | A channel-sharable built-in self-test scheme for multi-channel DRAMs. | Kuan-Te Wu, Jin-Fu Li, Chih-Yen Lo, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou |
| 2018 | ETS | Modeling and testing comparison faults of memristive ternary content addressable memories. | Li-Wei Deng, Jin-Fu Li, Yong-Xiao Chen |
| 2017 | ETS | A built-in self-test scheme for classifying refresh periods of DRAMs. | Chia-Ming Chang, Yong-Xiao Chen, Jin-Fu Li |
| 2016 | ETS | A built-in method for measuring the delay of TSVs in 3D ICs. | Han-Yu Wu, Yong-Xiao Chen, Jin-Fu Li |
| 2016 | ITC | A built-in self-repair scheme for DRAMs with spare rows, columns, and bits. | Chih-Sheng Hou, Yong-Xiao Chen, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou |
| 2016 | VTS | Fault modeling and testing of resistive nonvolatile-8T SRAMs. | Yu-Ting Li, Yong-Xiao Chen, Jin-Fu Li |
| 2015 | VTS | Fault modeling and testing of 1T1R memristor memories. | Yong-Xiao Chen, Jin-Fu Li |
| 2014 | ICCAD | The overview of 2014 CAD contest at ICCAD. | Iris Hui-Ru Jiang, Natarajan Viswanathan, Tai-Chen Chen, Jin-Fu Li |
| 2013 | VTS | Allocation of RAM built-in self-repair circuits for SOC dies of 3D ICs. | Chih-Sheng Hou, Jin-Fu Li |
| 2013 | VTS | Special session 4C: Hot topic 3D-IC design and test. | Jin-Fu Li, Cheng-Wen Wu, Masahiro Aoyagi, Meng-Fan Marvin Chang, Ding-Ming Kwai |
| 2013 | VTS | A hybrid ECC and redundancy technique for reducing refresh power of DRAMs. | Yun-Chao You, Chih-Sheng Hou, Li-Jung Chang, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu |
| 2012 | ASPDAC | On test and repair of 3D random access memory. | Cheng-Wen Wu, Shyue-Kung Lu, Jin-Fu Li |
| 2012 | ETS | Disturbance fault testing on various NAND flash memories. | Chih-Sheng Hou, Jin-Fu Li |
| 2012 | ITC | A built-in self-test scheme for 3D RAMs. | Yun-Chao You, Che-Wei Chou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu |
| 2012 | VTS | Test cost optimization technique for the pre-bond test of 3D ICs. | Yong-Xiao Chen, Yu-Jen Huang, Jin-Fu Li |
| 2011 | VTS | A built-in self-test scheme for the post-bond test of TSVs in 3D ICs. | Yu-Jen Huang, Jin-Fu Li, Ji-Jan Chen, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu |
| 2010 | ASPDAC | Is 3D integration an opportunity or just a hype? | Jin-Fu Li, Cheng-Wen Wu |
| 2010 | ETS | A low-cost and scalable test architecture for multi-core chips. | Chun-Chuan Chi, Cheng-Wen Wu, Jin-Fu Li |
| 2010 | ETS | A low-cost built-in self-test scheme for an array of memories. | Yu-Jen Huang, Che-Wei Chou, Jin-Fu Li |
| 2010 | VTS | Automatic generation of memory built-in self-repair circuits in SOCs for minimizing test time and area cost. | Tsu-Wei Tseng, Chih-Sheng Hou, Jin-Fu Li |
| 2009 | ISCAS | A Programmable Online/Off-line Built-in Self-test Scheme for RAMs with ECC. | Hsing-Chen Lu, Jin-Fu Li |
| 2009 | VTS | Modeling and Testing Comparison Faults of TCAMs with Asymmetric Cells. | Yong-Jyun Hu, Yu-Jen Huang, Jin-Fu Li |
| 2008 | ITC | A Shared Parallel Built-In Self-Repair Scheme for Random Access Memories in SOCs. | Tsu-Wei Tseng, Jin-Fu Li |
| 2007 | VTS | A Built-In Self-Repair Scheme for Multiport RAMs. | Tsu-Wei Tseng, Chun-Hsien Wu, Yu-Jen Huang, Jin-Fu Li, Alex Pao, Kevin Chiu, Eliot Chen |
| 2006 | DATE | A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap. | Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang |
| 2006 | ETS | Testing Active Neighborhood Pattern-Sensitive Faults of Ternary Content Addressable Memories. | Yu-Jen Huang, Jin-Fu Li |
| 2006 | ITC | A Reconfigurable Built-In Self-Repair Scheme for Multiple Repairable RAMs in SOCs. | Tsu-Wei Tseng, Jin-Fu Li, Chih-Chiang Hsu, Alex Pao, Kevin Chiu, Eliot Chen |
| 2005 | ASPDAC | Testing comparison faults of ternary CAMs based on comparison faults of binary CAMs. | Jin-Fu Li |
| 2005 | DATE | An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories. | Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey |
| 2005 | ISCAS | A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability. | Jin-Fu Li, Jiunn-Der Yu, Yu-Jen Huang |
| 2005 | ITC | Testing priority address encoder faults of content addressable memories. | Jin-Fu Li |
| 2005 | VTS | Modeling and Testing Comparison Faults for Ternary Content Addressable Memories. | Jin-Fu Li, Chou-Kun Lin |
| 2003 | ITC | A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy. | Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow |
| 2002 | DATE | A Hierarchical Test Scheme for System-On-Chip Designs. | Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin |
| 2002 | IOLTS | A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories. | Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu |
| 2002 | VTS | Testing and Diagnosing Embedded Content Addressable Memories. | Jin-Fu Li, Ruey-Shing Tzeng, Cheng-Wen Wu |
| 2001 | DATE | Memory fault diagnosis by syndrome compression. | Jin-Fu Li, Cheng-Wen Wu |
| 2001 | ITC | March-based RAM diagnosis algorithms for stuck-at and coupling faults. | Jin-Fu Li, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu |