| 2025 | VTS | Gate Leakage Current Integration-Based Dielectric Breakdown Monitor in a 12nm FinFET Process. | Mateo Rendn, Ian Hill, Andr Ivanov |
| 2024 | VTS | Enhanced Wear-Out Sensor Design in a 12nm Process for Separable Stress Regime Monitoring. | Ian Hill, Mateo Rendn, Andr Ivanov |
| 2023 | VTS | Gerabaldi: A Temporal Simulator for Probabilistic IC Degradation and Failure Processes. | Ian Hill, Andr Ivanov |
| 2022 | ETS | Prediction of Thermally Accelerated Aging Process at 28nm. | Parvez Anwar Chanawala, Ian Hill, S. Arash Sheikholeslam, Andr Ivanov |
| 2021 | PRDC | Are you for Real? Authentication in Dynamic IoT Systems. | Mehdi Karimibiuki, Karthik Pattabiraman, Andr Ivanov |
| 2018 | CCS | CORGIDS: A Correlation-based Generic Intrusion Detection System. | Ekta Aggarwal, Mehdi Karimibiuki, Karthik Pattabiraman, Andr Ivanov |
| 2018 | PRDC | DynPolAC: Dynamic Policy-Based Access Control for IoT Systems. | Mehdi Karimibiuki, Ekta Aggarwal, Karthik Pattabiraman, Andr Ivanov |
| 2016 | ISCAS | An improved test power optimization method by insertion of linear functions. | Lucheng He, Aijiao Cui, Mengyang Li, Andr Ivanov |
| 2015 | ICCAD | Reducing Post-Silicon Coverage Monitoring Overhead with Emulation and Bayesian Feature Selection. | Ricardo Ochoa Gallardo, Alan J. Hu, Andr Ivanov, Maryam S. Mirian |
| 2015 | ISCAS | A new decompressor with ordered parallel scan design for reduction of test data and test time. | Tingting Yu, Aijiao Cui, Mengyang Li, Andr Ivanov |
| 2011 | IOLTS | Self-checking test circuits for latches and flip-flops. | Renato P. Ribas, Yuyang Sun, Andr Incio Reis, Andr Ivanov |
| 2008 | ISCAS | Novel interconnect infrastructures for massive multicore chips - an overview. | Partha Pratim Pande, Amlan Ganguly, Benjamin Belzer, Alireza Nojeh, Andr Ivanov |
| 2007 | IOLTS | Essential Fault-Tolerance Metrics for NoC Infrastructures. | Cristian Grecu, Lorena Anghel, Partha Pratim Pande, Andr Ivanov, Resve A. Saleh |
| 2006 | IOLTS | On-line Fault Detection and Location for NoC Interconnects. | Cristian Grecu, Andr Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande |
| 2006 | VTS | BIST for Network-on-Chip Interconnect Infrastructures. | Cristian Grecu, Partha Pratim Pande, Andr Ivanov, Res Saleh |
| 2006 | VTS | Session Abstract. | Andr Ivanov |
| 2005 | ASPDAC | A retention-aware test power model for embedded SRAM. | Baosheng Wang, Josh Yang, Yuejian Wu, Andr Ivanov |
| 2005 | DATE | A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs. | Baosheng Wang, Yuejian Wu, Andr Ivanov |
| 2005 | ISCAS | Effect of traffic localization on energy dissipation in NoC-based interconnect. | Partha Pratim Pande, Cristian Grecu, Michael Jones, Andr Ivanov, Res Saleh |
| 2005 | ISCAS | A 0.35m CMOS comparator circuit for high-speed ADC applications. | Samad Sheikhaei, Shahriar Mirabbasi, Andr Ivanov |
| 2005 | ISCAS | A 4-bit 5 GS/s flash A/D converter in 0.18m CMOS. | Samad Sheikhaei, Shahriar Mirabbasi, Andr Ivanov |
| 2005 | ITC | A DDJ calibration methodology for high-speed test and measurement equipments. | Touraj Farahmand, Sassan Tabatabaei, Freddy Ben-Zeev, Andr Ivanov |
| 2005 | VTS | SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. | Baosheng Wang, Yuejian Wu, Josh Yang, Andr Ivanov, Yervant Zorian |
| 2004 | ITC | Jitter Models and Measurement Methods for High-Speed Serial Interconnects. | Andy Kuo, Touraj Farahmand, Nelson Ou, Andr Ivanov, Sassan Tabatabaei |
| 2004 | VLSID | Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode. | Josh Yang, Baosheng Wang, Andr Ivanov |
| 2004 | VTS | Sensing temperature in CMOS circuits for Thermal Testing. | Josep Altet, Antonio Rubio, M. Amine Salhi, Jose Luis Glvez, Stefan Dilhaire, Ashish Syal, Andr Ivanov |
| 2004 | VTS | Reducing Embedded SRAM Test Time under Redundancy Constraints. | Baosheng Wang, Josh Yang, James Cicalo, Andr Ivanov, Yervant Zorian |
| 2003 | DATE | Time Domain Multiplexed TAM: Implementation and Comparison. | Zahra Sadat Ebadi, Andr Ivanov |
| 2003 | ISCAS | Analog IP design flow for SoC applications. | Mama Hamour, Resve A. Saleh, Shahriar Mirabbasi, Andr Ivanov |
| 2003 | ISCAS | Design of a switch for network on chip applications. | Partha Pratim Pande, Cristian Grecu, Andr Ivanov, Res Saleh |
| 2003 | VTS | An Embedded Autonomous Scan-Based Results Analyzer (EARA) for SoC Cores. | Mohsen Nahvi, Andr Ivanov |
| 2002 | IOLTS | An Off-Chip Sensor Circuit for On-Line Transient Current Testing. | Bartomeu Alorda, Andr Ivanov, Jaume Segura |
| 2002 | ITC | Dedicated Autonomous Scan-Based Testing (DAST) for Embedded Cores. | Mohsen Nahvi, Andr Ivanov, Resve A. Saleh |
| 2002 | ITC | An Embedded Core for Sub-Picosecond Timing Measurements. | Sassan Tabatabaei, Andr Ivanov |
| 2001 | ETS | A packet switching communication-based test access mechanism for system chips. | Mohsen Nahvi, Andr Ivanov |
| 2001 | IOLTS | CMOS Differential and Absolute Thermal Sensors. | Ashish Syal, Victor Lee, Andr Ivanov, Josep Altet |
| 2000 | VTS | Do I Need this Tool for My Chips to Work? | Fidel Muradali, Andr Ivanov |
| 2000 | VTS | Biomedical ICs: What is Different about Testing those ICs? | Bapiraju Vinnakota, Andr Ivanov |
| 1999 | ISCAS | A built-in current monitor for testing analog circuit blocks. | Sassan Tabatabaei, Andr Ivanov |
| 1999 | ITC | Optimal conditions for Boolean and current detection of floating gate faults. | Michel Renovell, Andr Ivanov, Yves Bertrand, Florence Azas, Sumbal Rafiq |
| 1999 | VTS | A Current Integrator for BIST of Mixed-Signal ICs. | Sassan Tabatabaei, Andr Ivanov |
| 1995 | ISCAS | Fault Simulation of an OTA Biquadratic Filter. | Andrew Bishop, Andr Ivanov |
| 1993 | VTS | Minimal hardware multiple signature analysis for BIST. | Yuejian Wu, Andr Ivanov |
| 1992 | VTS | Accelerated path delay fault simulation. | Yuejian Wu, Andr Ivanov |
| 1991 | ITC | Fast Signature Computation for Linear Compactors. | D. Lambidonis, Andr Ivanov, Vinod K. Agarwal |
| 1990 | ICCAD | Computing the Error Escape Probability in Count-Based Compaction Schemes. | Andr Ivanov, Yervant Zorian |
| 1990 | ITC | EEODM: An effective BIST scheme for ROMs. | Yervant Zorian, Andr Ivanov |
| 1989 | ITC | : Experiments on Aliasing in Signature Analysis Registers. | Dhiren Xavier, Robert C. Aitken, Andr Ivanov, Vinod K. Agarwal |
| 1988 | ITC | On Multiple Fault Coverage and Aliasing Probability Measures. | Henry Cox, Andr Ivanov, Vinod K. Agarwal, Janusz Rajski |
| 1986 | ITC | Testability Measures : What Do They Do for ATPG ? | Andr Ivanov, Vinod K. Agarwal |