| 2019 | FCCM | Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules. | Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin |
| 2019 | FPGA | Maverick: A Stand-alone CAD Flow for Xilinx 7-Series FPGAs. | Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin |
| 2017 | FPL | Vivado design interface: An export/import capability for Vivado FPGA designs. | Thomas Townsend, Brent E. Nelson |
| 2016 | FPL | Efficient processing of phased array radar in sense and avoid application using heterogeneous computing. | Luke Newmeyer, Doran Wilde, Brent E. Nelson, Michael J. Wirthlin |
| 2016 | FPL | An XDL alternative for interfacing RapidSmith and Vivado. | Thomas Townsend, Brent E. Nelson, Michael J. Wirthlin |
| 2015 | FPGA | RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs. | Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings |
| 2013 | FPL | Rapid FPGA design prototyping through preservation of system logic: A case study. | Travis Haroldsen, Brent E. Nelson, Brad White |
| 2013 | FPL | Impact of hard macro size on FPGA clock rate and place/route time. | Christopher Lavin, Brent E. Nelson, Brad L. Hutchings |
| 2011 | FCCM | HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping. | Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings |
| 2011 | FPL | XDL-Based Module Generators for Rapid FPGA Design Implementation. | Subhrashankha Ghosh, Brent E. Nelson |
| 2011 | FPL | RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs. | Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings |
| 2010 | FPL | Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis. | Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin |
| 2010 | FPL | Using Hard Macros to Reduce FPGA Compilation Time. | Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin |
| 2009 | FCCM | Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). | Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis |
| 2009 | FPL | Comparing fine-grained performance on the Ambric MPPA against an FPGA. | Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis |
| 2008 | FCCM | Real-Time Optical Flow Calculations on FPGA and GPU Architectures: A Comparison Study. | Jeff Chase, Brent E. Nelson, John Bodily, Zhaoyi Wei, Dah-Jye Lee |
| 2008 | ICPR | Real-time accurate optical flow-based motion sensor. | Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald |
| 2008 | ISVC | Accurate Optical Flow Sensor for Obstacle Avoidance. | Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Kirt D. Lillywhite |
| 2007 | ISVC | A Hardware-Friendly Adaptive Tensor Based Optical Flow Algorithm. | Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson |
| 2007 | WACV | A Fast and Accurate Tensor-based Optical Flow Algorithm Implemented in FPGA. | Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Michael Martineau |
| 2005 | FCCM | Higher Radix Floating-Point Representations for FPGA-Based Arithmetic. | Bryan Catanzaro, Brent E. Nelson |
| 2005 | FPGA | Choice of base revisited: higher radices for FPGA-based floating-point computation (abstract only). | Bryan Catanzaro, Brent E. Nelson |
| 2005 | FPL | A Flexible Circuit-Switched NOC for FPGA-Based Systems. | Clint Hilton, Brent E. Nelson |
| 2004 | FPL | A Parallel FFT Architecture for FPGAs. | Joseph M. Palmer, Brent E. Nelson |
| 2004 | FPL | JHDLBits: The Merging of Two Worlds. | Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner |
| 2003 | FCCM | Reconfigurable Computing Application Frameworks. | Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings |
| 2003 | FCCM | Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs. | Xiaojun Wang, Brent E. Nelson |
| 2002 | FPL | Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture. | Eric Roesler, Brent E. Nelson |
| 2001 | FCCM | Instrumenting Bitstreams for Debugging FPGA Circuits. | Paul S. Graham, Brent E. Nelson, Brad L. Hutchings |
| 2001 | FPL | Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. | Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings |
| 2001 | ICASSP | Gigaop DSP on FPGA. | Brad L. Hutchings, Brent E. Nelson |
| 2000 | DAC | Using general-purpose programming languages for FPGA design. | Brad L. Hutchings, Brent E. Nelson |
| 2000 | FCCM | Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. | Paul S. Graham, Brad L. Hutchings, Brent E. Nelson |
| 2000 | FCCM | A Reconfigurable Computing Architecture for Microsensors. | Stephen M. Scalera, Mark Falco, Brent E. Nelson |
| 1999 | FCCM | A CAD Suite for High-Performance FPGA Design. | Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting |
| 1999 | FPL | Optimal Finite Field Multipliers for FPGAs. | Gregory C. Ahlquist, Brent E. Nelson, Michael Rice |
| 1999 | FPL | Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. | Paul S. Graham, Brent E. Nelson |
| 1998 | FCCM | Frequency-Domain Sonar Processing in FPGAs and DSPs. | Paul S. Graham, Brent E. Nelson |
| 1998 | FPGA | FPGA-Based Sonar Processing. | Paul S. Graham, Brent E. Nelson |
| 1996 | FCCM | Genetic algorithms in software and in hardware-a performance analysis of workstation and custom computing machine implementations. | Paul S. Graham, Brent E. Nelson |
| 1996 | MASCOTS | The Inaccuracy of Trace-Driven Simulation Using Incomplete Mulitprogramming Trace Data. | J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Gregory D. Thompson |
| 1996 | MASCOTS | Transaction Processing Workloads - A Comparison to the SPEC Benchmarks Using Memory Hierarchy Performance Studies. | Brent E. Nelson, Gregory D. Thompson, J. Kelly Flanagan |
| 1995 | FPL | A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2. | Paul S. Graham, Brent E. Nelson |
| 1993 | MASCOTS | Incomplete Trace Data and Trace Driven Simulation. | J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Knuth Stener Grimsrud |
| 1989 | ICASSP | Vector quantization codebook generation using simulated annealing. | J. Kelly Flanagan, Darryl Morrell, Richard L. Frost, Christopher J. Read, Brent E. Nelson |
| 1988 | ICCD | Processor design using path programmable logic. | J. Kelly Flanagan, Brent E. Nelson |
| 1987 | ICASSP | A multiprogrammed parallel architecture for digital signal processing. | Tao Li, Brent E. Nelson, J. Kelly Flanagan, Christopher J. Read |
| 1986 | ICASSP | A bit-serial VLSI vector quantizer. | Brent E. Nelson, Christopher J. Read |
| 1984 | DAC | The structure and operation of a relational database system in a cell-oriented integrated circuit design system. | Lee A. Hollaar, Brent E. Nelson, Tony M. Carter, Raymond A. Lorie |