Brion L. Keller
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
21
Venues
3
Active years
1991–2014
Best venue rank
A
Where they publish
Papers
21 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | ITC | Efficient testing of hierarchical core-based SOCs. | Brion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, Akhil Garg, Richard Schoonover, James Sage, Don Pearl, Thomas J. Snethen |
| 2013 | ETS | Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers. | Christos Papameletis, Brion L. Keller, Vivek Chickermane, Erik Jan Marinissen, Said Hamdioui |
| 2013 | ITC | Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study. | Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim |
| 2012 | ITC | DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks. | Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen |
| 2010 | ITC | Low cost at-speed testing using On-Product Clock Generation compatible with test compression. | Brion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, R. Malneedi, Thomas J. Snethen, Vikram Iyengar, David E. Lackey, Gary Grise |
| 2009 | ITC | Capture power reduction using clock gating aware test generation. | Krishna Chakravadhanula, Vivek Chickermane, Brion L. Keller, Patrick R. Gallagher Jr., Prashant Narang |
| 2007 | ITC | Automated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation. | Anis Uzzaman, Bibo Li, Thomas J. Snethen, Brion L. Keller, Gary Grise |
| 2006 | ITC | OCI: Open Compression Interface. | Bruce Cory, Rohit Kapur, Mick Tegethoff, Mark Kassab, Brion L. Keller, Kee Sup Kim, Dwayne Burek, Steven F. Oakland, Benoit Nadeau-Dostie |
| 2005 | ITC | Encounter test OPMISR | Brion L. Keller |
| 2005 | ITC | Use of MISRs for compression and diagnostics. | Brion L. Keller, Thomas Bartenstein |
| 2004 | ITC | Channel Masking Synthesis for Efficient On-Chip Test Compression. | Vivek Chickermane, Brian Foutz, Brion L. Keller |
| 2004 | ITC | An Economic Analysis and ROI Model for Nanometer Test. | Brion L. Keller, Mick Tegethoff, Thomas Bartenstein, Vivek Chickermane |
| 2001 | ICCD | High Performance Parallel Fault Simulation. | Amit K. Varshney, Bapiraju Vinnakota, Eric Skuldt, Brion L. Keller |
| 2001 | ITC | OPMISR: the foundation for compressed ATPG vectors. | Carl Barnhart, Vanessa Brunkhorst, Frank Distler, Owen Farnsworth, Brion L. Keller, Bernd Knemann, Andrej Ferko |
| 2001 | ITC | CTL the language for describing core-based test. | Rohit Kapur, Maurice Lousberg, Tony Taylor, Brion L. Keller, Paul Reuter, Douglas Kay |
| 2000 | ITC | Design and implementation of a parallel automatic test pattern generation algorithm with low test vector count. | Robert Butler, Brion L. Keller, Sarala Paliwal, Richard Schoonover, Joseph Swenton |
| 1999 | ICCD | Design and Implementation of a Parallel Weighted Random Pattern and Logic Built in Self Test Algorithm. | Paul Chang, Brion L. Keller, Sarala Paliwal |
| 1999 | ITC | Using STIL to describe embedded core test requirements. | Brion L. Keller |
| 1998 | ITC | ATPG in practical and non-traditional applications. | Brion L. Keller, Kevin McCauley, Joseph Swenton, James Youngs |
| 1992 | ITC | Delay Test: The Next Frontier for LSSD Test Systems. | Bernd Knemann, J. Barlow, Paul Chang, R. Gabrielson, C. Goertz, Brion L. Keller, Kevin McCauley, J. Tischer, Vijay S. Iyengar, Barry K. Rosen, T. Williams |
| 1991 | ICCD | Design Automation of Test for the EX/9000 | Brion L. Keller, David A. Haynes |