| 2021 | DATE | Power Reduction of a Set-Associative Instruction Cache Using a Dynamic Early Tag Lookup. | Chun-Chang Yu, Yu Hen Hu, Yi-Chang Lu, Charlie Chung-Ping Chen |
| 2016 | DATE | Lossless compression algorithm based on dictionary coding for multiple e-beam direct write system. | Pei-Chun Lin, Yu-Hsuan Pai, Yu-Hsiang Chiu, Shao-Yuan Fang, Charlie Chung-Ping Chen |
| 2015 | ISCAS | A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme. | Ai Chien, Shuo-Hong Hung, Kuan-I Wu, Chang-Yi Liu, Min-Han Hsieh, Charlie Chung-Ping Chen |
| 2015 | ISCAS | A 160MHz-to-2GHz low jitter fast lock all-digital DLL with phase tracking technique. | Shuo-Hong Hung, Wei-Hao Kao, Kuan-I Wu, Yi-Wei Huang, Min-Han Hsieh, Charlie Chung-Ping Chen |
| 2015 | ISCAS | A fast-settling high linearity auto gain control for broadband OFDM-based PLC system. | Kuan-I Wu, Szu-Yao Hung, Shuo-Hong Hung, Charlie Chung-Ping Chen |
| 2014 | ISCAS | Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation. | Kuan-I Wu, Shuo-Hong Hung, Shang-Yu Shieh, Bor-Tsang Hwang, Szu-Yao Hung, Charlie Chung-Ping Chen |
| 2013 | ISCAS | A 10-bit current-steering DAC for HomePlug AV2 powerline communication system in 90nm CMOS. | Wei-Sheng Cheng, Min-Han Hsieh, Shuo-Hong Hung, Szu-Yao Hung, Charlie Chung-Ping Chen |
| 2013 | ISCAS | A high dynamic range programmable gain amplifier for HomePlug AV powerline communication system. | Szu-Yao Hung, Kai-Hsiang Chan, Charlie Chung-Ping Chen |
| 2013 | ISCAS | A 52 dBc MTPR line driver for powerline communication HomePlug AV standard in 0.18-μm CMOS technology. | Pang-Kai Liu, Szu-Yao Hung, Chang-Yi Liu, Min-Han Hsieh, Charlie Chung-Ping Chen |
| 2012 | ISCAS | A 2 - 8 GHz multi-phase distributed DLL using phase insertion in 90 nm. | Min-Han Hsieh, Bing-Feng Lin, Yu-Shun Wang, Hao-Huei Chang, Charlie Chung-Ping Chen |
| 2011 | ISCAS | A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. | Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen |
| 2011 | ISCAS | A 12 Gb/s chip-to-chip AC coupled transceiver. | Yu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen |
| 2010 | ASPDAC | Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. | Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu |
| 2008 | ASPDAC | LTCC spiral inductor modeling, synthesis, and optimization. | Tuck Boon Chan, Hsinchia Lu, Jun-Kuei Zeng, Charlie Chung-Ping Chen |
| 2008 | ASPDAC | An optimal algorithm for sizing sequential circuits for industrial library based designs. | Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng |
| 2008 | DAC | Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications. | Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen |
| 2007 | ASPDAC | SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. | Sanghamitra Roy, Charlie Chung-Ping Chen |
| 2006 | ASPDAC | Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops. | Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen |
| 2006 | DATE | Statistical timing analysis with path reconvergence and spatial correlations. | Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen |
| 2006 | ISCAS | Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method. | Pei-Yu Huang, Yu-Min Lee, Jeng-Liang Tsai, Charlie Chung-Ping Chen |
| 2005 | ASPDAC | Fast and effective gate-sizing with multiple-Vt assignment using generalized Lagrangian Relaxation. | Hsinwei Chou, Yu-Hao Wang, Charlie Chung-Ping Chen |
| 2005 | ASPDAC | Comprehensive frequency dependent interconnect extraction and evaluation methodology. | Rong Jiang, Charlie Chung-Ping Chen |
| 2005 | ASPDAC | Process-variation robust and low-power zero-skew buffered clock-tree synthesis using projected scan-line sampling. | Jeng-Liang Tsai, Charlie Chung-Ping Chen |
| 2005 | ASPDAC | Wave-pipelined on-chip global interconnect. | Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen |
| 2005 | ASPDAC | Block based statistical timing analysis with extended canonical timing model. | Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen |
| 2005 | DAC | ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction. | Rong Jiang, Yi-Hao Chang, Charlie Chung-Ping Chen |
| 2005 | DAC | Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model. | Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubner, Charlie Chung-Ping Chen |
| 2005 | DATE | Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model. | Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen |
| 2005 | ICCAD | Efficient statistical capacitance variability modeling with orthogonal principle factor analysis. | Rong Jiang, Wenyin Fu, Janet Meiling Wang, Vince Lin, Charlie Chung-Ping Chen |
| 2005 | ICCAD | System-level power and thermal modeling and analysis by orthogonal polynomial based response surface approach (OPRS). | Janet Meiling Wang, Bharat Srinivas, Dongsheng Ma, Charlie Chung-Ping Chen, Jun Li |
| 2005 | VLSID | False Path and Clock Scheduling Based Yield-Aware Gate Sizing. | Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja |
| 2004 | ASPDAC | Frequency-dependent reluctance extraction. | Clement Luk, Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2004 | DAC | Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining. | Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen |
| 2004 | DATE | SCORE: SPICE COmpatible Reluctance Extraction. | Rong Jiang, Charlie Chung-Ping Chen |
| 2004 | DATE | Realizable Reduction for Electromagnetically Coupled RLMC Interconnects. | Rong Jiang, Charlie Chung-Ping Chen |
| 2004 | DATE | Thermal and Power Integrity Based Power/Ground Networks Optimization. | Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen |
| 2004 | ICCAD | A yield improvement methodology using pre- and post-silicon statistical clock scheduling. | Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja |
| 2003 | ASPDAC | A hierarchical analysis methodology for chip-level power delivery with realizable model reduction. | Yu-Min Lee, Charlie Chung-Ping Chen |
| 2003 | DATE | The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method . | Yu-Min Lee, Charlie Chung-Ping Chen |
| 2003 | ICCAD | SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation. | Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen |
| 2003 | ISCAS | PODEA: Power delivery efficient analysis with realizable model reduction. | Rong Jiang, Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2002 | DAC | HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery. | Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2002 | ICCAD | INDUCTWISE: inductance-wise interconnect simulator and extractor. | Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, Charlie Chung-Ping Chen |
| 2001 | ASPDAC | Optimal spacing and capacitance padding for general clock structures. | Yu-Min Lee, Hing Yin Lai, Charlie Chung-Ping Chen |
| 2001 | DAC | Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods. | Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2001 | ICCAD | Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method. | Yu-Min Lee, Charlie Chung-Ping Chen |
| 2001 | ICCD | Linear Time Hierarchical Capacitance Extraction without Multipole Expansion. | Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee, Charlie Chung-Ping Chen |
| 2001 | ICCD | RC-in RC-out Model Order Reduction Accurate up to Second Order Moments. | Pradeepsunder Ganesh, Charlie Chung-Ping Chen |
| 2000 | ICCAD | Generalized FDTD-ADI: An Unconditionally Stable Full-Wave Maxwell's Equations Solver for VLSI Interconnect Modeling. | Charlie Chung-Ping Chen, Tae-Woo Lee, Narayanan Murugesan, Susan C. Hagness |