| 2024 | USENIX | Evaluating Chiplet-based Large-Scale Interconnection Networks via Cycle-Accurate Packet-Parallel Simulation. | Yinxiao Feng, Yuchen Wei, Dong Xiang, Kaisheng Ma |
| 2023 | HPCA | A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets. | Yinxiao Feng, Dong Xiang, Kaisheng Ma |
| 2023 | MICRO | Heterogeneous Die-to-Die Interfaces: Enabling More Flexible Chiplet Interconnection Systems. | Yinxiao Feng, Dong Xiang, Kaisheng Ma |
| 2021 | COCOON | All-to-All Broadcast in Dragonfly Networks. | Dong Xiang, Yunzhou Ju |
| 2020 | VTS | Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing. | Dong Xiang, Jiaming Cai, Bo Liu |
| 2019 | NSDI | NetBouncer: Active Device and Link Failure Localization in Data Center Networks. | Cheng Tan, Ze Jin, Chuanxiong Guo, Tianrong Zhang, Haitao Wu, Karl Deng, Dongming Bi, Dong Xiang |
| 2018 | COMPSAC | The Column-Partition and Row-Partition Turn Model. | Yuan Cai, Wei Luo, Dong Xiang |
| 2018 | ISPA | Deadlock-Free Adaptive Routing Based on the Repetitive Turn Model for 3D Network-on-Chip. | Yuan Cai, Dong Xiang, Xiang Ji |
| 2016 | ITC | A unified test and fault-tolerant multicast solution for network-on-chip designs. | Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara |
| 2015 | SIGCOMM | Pingmesh: A Large-Scale System for Data Center Network Latency Measurement and Analysis. | Chuanxiong Guo, Lihua Yuan, Dong Xiang, Yingnong Dang, Ray Huang, David A. Maltz, Zhaoyi Liu, Vin Wang, Bin Pang, Hua Chen, Zhi-Wei Lin, Varugis Kurien |
| 2014 | DASFAA | Cloud-Scale Transaction Processing with ParaDB System: A Demonstration. | Xiaoyan Guo, Yu Cao, Baoyao Zhou, Dong Xiang, Liyuan Zhao |
| 2013 | APCC | Regularization selection method for LMS-type sparse multipath channel estimation. | Zhengxing Huang, Guan Gui, An-min Huang, Dong Xiang, Fumiyuki Adachi |
| 2013 | HPCC | VCBR: Virtual Channel Balanced Routing in Torus Networks. | Zhigang Yu, Dong Xiang, Xinyu Wang |
| 2013 | TrustCom | Deadlock-Free Fully Adaptive Routing in Irregular Networks without Virtual Channels. | Dong Xiang, Zhigang Yu, Jie Wu |
| 2013 | SRDS | A Fault-Tolerant Routing Algorithm Design for On-Chip Optical Networks. | Dong Xiang, Yan Zhang, Shuchang Shan, Yi Xu |
| 2012 | ISPA | Multiple Spanning Tree Construction for Deadlock-Free Adaptive Routing in Irregular Networks. | Dong Xiang, Jiangxue Han |
| 2011 | ASPDAC | Compression-aware capture power reduction for at-speed testing. | Jia Li, Qiang Xu, Dong Xiang |
| 2011 | VTS | Prediction of compression bound and optimization of compression architecture for linear decompression-based schemes. | Jia Li, Yu Huang, Dong Xiang |
| 2010 | ICCAD | MVP: Capture-power reduction with minimum-violations partitioning for delay testing. | Zhen Chen, Krishnendu Chakrabarty, Dong Xiang |
| 2010 | ICCD | DfT optimization for pre-bond testing of 3D-SICs containing TSVs. | Jia Li, Dong Xiang |
| 2010 | ICPADS | Multi-mapping Meshes: A New Communicating Fabric for Networks-on-Chip. | Xinyu Wang, Dong Xiang |
| 2010 | PDCAT | An Effective Congestion-Aware Selection Function for Adaptive Routing in Interconnection Networks. | YanBin Lin, Dong Xiang |
| 2010 | VLSID | A Unified Solution to Scan Test Volume, Time, and Power Minimization. | Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya |
| 2010 | VTS | A novel hybrid delay testing scheme with low test power, volume, and time. | Zhen Chen, Sharad C. Seth, Dong Xiang |
| 2010 | VTS | Low-capture-power at-speed testing using partial launch-on-capture test scheme. | Zhen Chen, Dong Xiang |
| 2009 | ASPDAC | Conflict driven scan chain configuration for high transition fault coverage and low test power. | Zhen Chen, Boxue Yin, Dong Xiang |
| 2009 | VLSID | New Techniques for Accelerating Small Delay ATPG and Generating Compact Test Sets. | Boxue Yin, Dong Xiang, Zhen Chen |
| 2009 | VTS | The ATPG Conflict-Driven Scheme for High Transition Fault Coverage and Low Test Cost. | Zhen Chen, Dong Xiang, Boxue Yin |
| 2009 | VTS | Dynamic Test Compaction for Transition Faults in Broadside Scan Testing Based on an Influence Cone Measure. | Dong Xiang, Boxue Yin, Kwang-Ting Cheng |
| 2008 | ICA3PP | Deadlock-Free Adaptive Routing in 2D Tori with a New Turn Model. | Dong Xiang, Qi Wang, Yi Pan |
| 2008 | ICDCS | Deadlock-Free Fully Adaptive Routing in 2-Dimensional Tori Based on New Virtual Network Partitioning Scheme. | Dong Xiang, Yi Pan, Qi Wang, Zhen Chen |
| 2008 | ICPP | Deadlock-Free Fully Adaptive Routing in Tori Based on a New Virtual Network Partitioning Scheme. | Dong Xiang, Qi Wang, Yi Pan |
| 2008 | WCNC | A Density Adaptive Routing Protocol for Large-Scale Ad Hoc Networks. | Zhizhou Li, Yaxiong Zhao, Yong Cui, Dong Xiang |
| 2007 | ICPP | Deadlock-Free Adaptive Routing in Meshes Based on Cost-Effective Deadlock Avoidance Schemes. | Dong Xiang, Yueli Zhang, Yi Pan, Jie Wu |
| 2007 | ITC | Fast and effective fault simulation for path delay faults based on selected testable paths. | Dong Xiang, Yang Zhao, Kaiwei Li, Hideo Fujiwara |
| 2007 | ITC | Pattern-directed circuit virtual partitioning for test power reduction. | Qiang Xu, Dianwei Hu, Dong Xiang |
| 2006 | ICCD | Generating Compact Robust and Non-Robust Tests for Complete Coverage of Path Delay Faults Based on Stuck-at Tests. | Dong Xiang, Kaiwei Li, Hideo Fujiwara, Jiaguang Sun |
| 2006 | ISDA | A Hybrid Heuristic Approach for Disassembly/Recycle Applications. | Hui Wang, Dong Xiang, Guanghong Duan, Jie Song |
| 2005 | ICPP | Fault-Tolerant Routing in Meshes/Tori Using Planarly Constructed Fault Blocks. | Dong Xiang, Jia-Guang Sun, Jie Wu, Krishnaiyan Thulasiraman |
| 2003 | DAC | A cost-effective scan architecture for scan testing with non-scan test power and test application cost. | Dong Xiang, Shan Gu, Jia-Guang Sun, Yu-Liang Wu |
| 2002 | ICPADS | Fault-Tolerant Broadcasting in Hypercubes via Local Safety Information. | Dong Xiang, Ai Chen, Jie Wu |
| 2002 | ICPP | Fault-Tolerant Routing in 2D Tori or Meshes Using Limited-Global-Safety Information. | Dong Xiang, Ai Chen |
| 2001 | ICCD | Cost-Effective Non-Scan Design for Testability for Actual Testability Improvement. | Dong Xiang, Yi Xu |
| 2001 | SP | Information-Theoretic Measures for Anomaly Detection. | Wenke Lee, Dong Xiang |
| 2001 | VTS | Partial Reset for Synchronous Sequential Circuits Using Almost Independent Reset Signals. | Dong Xiang, Yi Xu |
| 2000 | ITC | Non-scan design for testability for synchronous sequential circuits based on conflict analysis. | Dong Xiang, Yi Xu, Hideo Fujiwara |
| 1996 | DAC | Partial Scan Design Based on Circuit State Information. | Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel |
| 1996 | ITC | A Global Algorithm for the Partial Scan Design Problem Using Circuit State Information. | Dong Xiang, Janak H. Patel |
| 1994 | VLSID | An Optimal Design for Parallel Test Generation Based on Circuit Partitioning. | Dong Xiang, Daozheng Wei |
| 1992 | VLSID | A Global Test Point Placement Algorithm of Combinational Circuits. | Dong Xiang, Daozheng Wei, Shisong Chen |